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authorHal Finkel <hfinkel@anl.gov>2015-04-23 18:30:38 +0000
committerHal Finkel <hfinkel@anl.gov>2015-04-23 18:30:38 +0000
commit7c5cb066d091eed948d0ef10bb15b9def37b81ab (patch)
tree0e373508c363bd3b312a69e8dd4dbf71a6afaa12 /llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
parent9cf4f2c2d8347c9e7843ac4c00854ca0eb386ac1 (diff)
downloadbcm5719-llvm-7c5cb066d091eed948d0ef10bb15b9def37b81ab.tar.gz
bcm5719-llvm-7c5cb066d091eed948d0ef10bb15b9def37b81ab.zip
[PowerPC] Enable printing instructions using aliases
TableGen had been nicely generating code to print a number of instructions using shorter aliases (and PowerPC has plenty of short mnemonics), but we were not calling it. For some of the aliases we support in the parser, TableGen can't infer the "inverse" alias relationship, so there is still more to do. Thus, after some hours of updating test cases... llvm-svn: 235616
Diffstat (limited to 'llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp')
-rw-r--r--llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp6
1 files changed, 4 insertions, 2 deletions
diff --git a/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp b/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
index 15765440e87..046682ddfc3 100644
--- a/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
+++ b/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
@@ -31,6 +31,7 @@ static cl::opt<bool>
FullRegNames("ppc-asm-full-reg-names", cl::Hidden, cl::init(false),
cl::desc("Use full register names when printing assembly"));
+#define PRINT_ALIAS_INSTR
#include "PPCGenAsmWriter.inc"
void PPCInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
@@ -111,8 +112,9 @@ void PPCInstPrinter::printInst(const MCInst *MI, raw_ostream &O,
// precision). FIXME: Is there a better solution?
if (MI->getOpcode() == TargetOpcode::COPY_TO_REGCLASS)
return;
-
- printInstruction(MI, O);
+
+ if (!printAliasInstr(MI, O))
+ printInstruction(MI, O);
printAnnotation(O, Annot);
}
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