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authorOliver Stannard <oliver.stannard@arm.com>2017-10-11 09:17:43 +0000
committerOliver Stannard <oliver.stannard@arm.com>2017-10-11 09:17:43 +0000
commit4191b9eaeacd27c294e0a1e905aec38fd8584e87 (patch)
tree083d33d8a90a7a014e6d4041676440ea87137e41 /llvm/lib/Target/PowerPC/AsmParser
parentdbd7c338a01d51bb83ecc14edbe566cc868e8c2c (diff)
downloadbcm5719-llvm-4191b9eaeacd27c294e0a1e905aec38fd8584e87.tar.gz
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[Asm] Add debug tracing in table-generated assembly matcher
This adds debug tracing to the table-generated assembly instruction matcher, enabled by the -debug-only=asm-matcher option. The changes in the target AsmParsers are to add an MCInstrInfo reference under a consistent name, so that we can use it from table-generated code. This was already being used this way for targets that use deprecation warnings, but 5 targets did not have it, and Hexagon had it under a different name to the other backends. llvm-svn: 315445
Diffstat (limited to 'llvm/lib/Target/PowerPC/AsmParser')
-rw-r--r--llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp3
1 files changed, 1 insertions, 2 deletions
diff --git a/llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp b/llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
index 98be18b1099..2fbf51007c3 100644
--- a/llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
+++ b/llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
@@ -251,7 +251,6 @@ namespace {
struct PPCOperand;
class PPCAsmParser : public MCTargetAsmParser {
- const MCInstrInfo &MII;
bool IsPPC64;
bool IsDarwin;
@@ -298,7 +297,7 @@ class PPCAsmParser : public MCTargetAsmParser {
public:
PPCAsmParser(const MCSubtargetInfo &STI, MCAsmParser &,
const MCInstrInfo &MII, const MCTargetOptions &Options)
- : MCTargetAsmParser(Options, STI), MII(MII) {
+ : MCTargetAsmParser(Options, STI, MII) {
// Check for 64-bit vs. 32-bit pointer mode.
const Triple &TheTriple = STI.getTargetTriple();
IsPPC64 = (TheTriple.getArch() == Triple::ppc64 ||
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