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authorUlrich Weigand <ulrich.weigand@de.ibm.com>2013-06-24 11:03:33 +0000
committerUlrich Weigand <ulrich.weigand@de.ibm.com>2013-06-24 11:03:33 +0000
commitb6a30d159e3e2e322a422c4c31c6d379ff299811 (patch)
tree3622a99b1197a25061448cdefcf64352028a4bd7 /llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
parent5b9d591ad108653cb4d696da2bda023ddbb51501 (diff)
downloadbcm5719-llvm-b6a30d159e3e2e322a422c4c31c6d379ff299811.tar.gz
bcm5719-llvm-b6a30d159e3e2e322a422c4c31c6d379ff299811.zip
[PowerPC] Support absolute branches
There is currently only limited support for the "absolute" variants of branch instructions. This patch adds support for the absolute variants of all branches that are currently otherwise supported. This requires adding new fixup types so that the correct variant of relocation type can be selected by the object writer. While the compiler will continue to usually choose the relative branch variants, this will allow the asm parser to fully support the absolute branches, with either immediate (numerical) or symbolic target addresses. No change in code generation intended. llvm-svn: 184721
Diffstat (limited to 'llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp')
-rw-r--r--llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp14
1 files changed, 14 insertions, 0 deletions
diff --git a/llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp b/llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
index 6318d416f5e..999c6778248 100644
--- a/llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
+++ b/llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
@@ -267,6 +267,12 @@ public:
bool isS16ImmX4() const { return Kind == Expression ||
(Kind == Immediate && isInt<16>(getImm()) &&
(getImm() & 3) == 0); }
+ bool isDirectBr() const { return Kind == Expression ||
+ (Kind == Immediate && isInt<26>(getImm()) &&
+ (getImm() & 3) == 0); }
+ bool isCondBr() const { return Kind == Expression ||
+ (Kind == Immediate && isInt<16>(getImm()) &&
+ (getImm() & 3) == 0); }
bool isRegNumber() const { return Kind == Immediate && isUInt<5>(getImm()); }
bool isCCRegNumber() const { return Kind == Immediate &&
isUInt<3>(getImm()); }
@@ -351,6 +357,14 @@ public:
Inst.addOperand(MCOperand::CreateExpr(getExpr()));
}
+ void addBranchTargetOperands(MCInst &Inst, unsigned N) const {
+ assert(N == 1 && "Invalid number of operands!");
+ if (Kind == Immediate)
+ Inst.addOperand(MCOperand::CreateImm(getImm() / 4));
+ else
+ Inst.addOperand(MCOperand::CreateExpr(getExpr()));
+ }
+
StringRef getToken() const {
assert(Kind == Token && "Invalid access!");
return StringRef(Tok.Data, Tok.Length);
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