PTX: Improve support for 64-bit addressing

- Fix bug in ADDRrr/ADDRri/ADDRii selection for 64-bit addresses
- Add comparison selection for i64
- Add zext selection for i32 -> i64
- Add shl/shr/sha support for i64

llvm-svn: 128153

1 files changed, 4 insertions, 1 deletions

diff --git a/llvm/lib/Target/PTX/PTXISelLowering.cpp b/llvm/lib/Target/PTX/PTXISelLowering.cpp
index 1a23bc217d0..a58cb80b287 100644
--- a/llvm/lib/Target/PTX/PTXISelLowering.cpp
+++ b/llvm/lib/Target/PTX/PTXISelLowering.cpp
@@ -41,6 +41,7 @@ PTXTargetLowering::PTXTargetLowering(TargetMachine &TM)
 
   // Customize translation of memory addresses
   setOperationAction(ISD::GlobalAddress, MVT::i32, Custom);
+  setOperationAction(ISD::GlobalAddress, MVT::i64, Custom);
 
   // Expand BR_CC into BRCOND
   setOperationAction(ISD::BR_CC, MVT::Other, Expand);
@@ -85,10 +86,12 @@ LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const {
   DebugLoc dl = Op.getDebugLoc();
   const GlobalValue *GV = cast<GlobalAddressSDNode>(Op)->getGlobal();
 
+  assert(PtrVT.isSimple() && "Pointer must be to primitive type.");
+
   SDValue targetGlobal = DAG.getTargetGlobalAddress(GV, dl, PtrVT);
   SDValue movInstr = DAG.getNode(PTXISD::COPY_ADDRESS,
                                  dl,
-                                 MVT::i32,
+                                 PtrVT.getSimpleVT(),
                                  targetGlobal);
 
   return movInstr;