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author | Artem Belevich <tra@google.com> | 2016-09-28 17:25:38 +0000 |
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committer | Artem Belevich <tra@google.com> | 2016-09-28 17:25:38 +0000 |
commit | 3e1211581c7e9b65511bca0b7d24eaf4bc4e032f (patch) | |
tree | 9ba5a2744358610672bab7a1104ff4c6716395ad /llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp | |
parent | f0022125e099c400dee4f8a0299c5b4579193a53 (diff) | |
download | bcm5719-llvm-3e1211581c7e9b65511bca0b7d24eaf4bc4e032f.tar.gz bcm5719-llvm-3e1211581c7e9b65511bca0b7d24eaf4bc4e032f.zip |
[NVPTX] Added intrinsics for atom.gen.{sys|cta}.* instructions.
These are only available on sm_60+ GPUs.
Differential Revision: https://reviews.llvm.org/D24943
llvm-svn: 282607
Diffstat (limited to 'llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp')
-rw-r--r-- | llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp b/llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp index 580d345cc66..48928ee2d54 100644 --- a/llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp +++ b/llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp @@ -42,6 +42,29 @@ static bool isNVVMAtomic(const IntrinsicInst *II) { case Intrinsic::nvvm_atomic_load_add_f32: case Intrinsic::nvvm_atomic_load_inc_32: case Intrinsic::nvvm_atomic_load_dec_32: + + case Intrinsic::nvvm_atomic_add_gen_f_cta: + case Intrinsic::nvvm_atomic_add_gen_f_sys: + case Intrinsic::nvvm_atomic_add_gen_i_cta: + case Intrinsic::nvvm_atomic_add_gen_i_sys: + case Intrinsic::nvvm_atomic_and_gen_i_cta: + case Intrinsic::nvvm_atomic_and_gen_i_sys: + case Intrinsic::nvvm_atomic_cas_gen_i_cta: + case Intrinsic::nvvm_atomic_cas_gen_i_sys: + case Intrinsic::nvvm_atomic_dec_gen_i_cta: + case Intrinsic::nvvm_atomic_dec_gen_i_sys: + case Intrinsic::nvvm_atomic_inc_gen_i_cta: + case Intrinsic::nvvm_atomic_inc_gen_i_sys: + case Intrinsic::nvvm_atomic_max_gen_i_cta: + case Intrinsic::nvvm_atomic_max_gen_i_sys: + case Intrinsic::nvvm_atomic_min_gen_i_cta: + case Intrinsic::nvvm_atomic_min_gen_i_sys: + case Intrinsic::nvvm_atomic_or_gen_i_cta: + case Intrinsic::nvvm_atomic_or_gen_i_sys: + case Intrinsic::nvvm_atomic_exch_gen_i_cta: + case Intrinsic::nvvm_atomic_exch_gen_i_sys: + case Intrinsic::nvvm_atomic_xor_gen_i_cta: + case Intrinsic::nvvm_atomic_xor_gen_i_sys: return true; } } |