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author | Jingyue Wu <jingyue@google.com> | 2015-07-16 20:13:48 +0000 |
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committer | Jingyue Wu <jingyue@google.com> | 2015-07-16 20:13:48 +0000 |
commit | e7981cee2427baba5ae2ec560a21c55658abf304 (patch) | |
tree | bc475f4b13298424fafa24e5983c82f73552f5d2 /llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp | |
parent | af7d7709d697ac7d0dbb726dd57466264ef89dad (diff) | |
download | bcm5719-llvm-e7981cee2427baba5ae2ec560a21c55658abf304.tar.gz bcm5719-llvm-e7981cee2427baba5ae2ec560a21c55658abf304.zip |
[NVPTX] enable SpeculativeExecution in NVPTX
Summary:
SpeculativeExecution enables a series straight line optimizations (such
as SLSR and NaryReassociate) on conditional code. For example,
if (...)
... b * s ...
if (...)
... (b + 1) * s ...
speculative execution can hoist b * s and (b + 1) * s from then-blocks,
so that we have
... b * s ...
if (...)
...
... (b + 1) * s ...
if (...)
...
Then, SLSR can rewrite (b + 1) * s to (b * s + s) because after
speculative execution b * s dominates (b + 1) * s.
The performance impact of this change is significant. It speeds up the
benchmarks running EigenFloatContractionKernelInternal16x16
(https://bitbucket.org/eigen/eigen/src/ba68f42fa69e4f43417fe1e52669d4dd5d2b3bee/unsupported/Eigen/CXX11/src/Tensor/TensorContractionCuda.h?at=default#cl-526)
by roughly 2%. Some internal benchmarks that have the above code pattern
are improved by up to 40%. No significant slowdowns are observed on
Eigen CUDA microbenchmarks.
Reviewers: jholewinski, broune, eliben
Subscribers: llvm-commits, jholewinski
Differential Revision: http://reviews.llvm.org/D11201
llvm-svn: 242437
Diffstat (limited to 'llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp')
-rw-r--r-- | llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp b/llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp index 7314af1ad50..20dfc2a5370 100644 --- a/llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp +++ b/llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp @@ -181,6 +181,7 @@ void NVPTXPassConfig::addIRPasses() { // requires manual work and might be error-prone. addPass(createDeadCodeEliminationPass()); addPass(createSeparateConstOffsetFromGEPPass()); + addPass(createSpeculativeExecutionPass()); // ReassociateGEPs exposes more opportunites for SLSR. See // the example in reassociate-geps-and-slsr.ll. addPass(createStraightLineStrengthReducePass()); |