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author | Artem Belevich <tra@google.com> | 2017-07-20 21:16:03 +0000 |
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committer | Artem Belevich <tra@google.com> | 2017-07-20 21:16:03 +0000 |
commit | d7a73824e46ac8aae8b7ba03069c662fb32f0f20 (patch) | |
tree | 147d23119b0dc5c0824618ed3c4714e388357fe9 /llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp | |
parent | e5456ce5e515a77fa4e1b447d1286be25b5ab525 (diff) | |
download | bcm5719-llvm-d7a73824e46ac8aae8b7ba03069c662fb32f0f20.tar.gz bcm5719-llvm-d7a73824e46ac8aae8b7ba03069c662fb32f0f20.zip |
[NVPTX] Add lowering of i128 params.
The patch adds support of i128 params lowering. The changes are quite trivial to
support i128 as a "special case" of integer type. With this patch, we lower i128
params the same way as aggregates of size 16 bytes: .param .b8 _ [16].
Currently, NVPTX can't deal with the 128 bit integers:
* in some cases because of failed assertions like
ValVTs.size() == OutVals.size() && "Bad return value decomposition"
* in other cases emitting PTX with .i128 or .u128 types (which are not valid [1])
[1] http://docs.nvidia.com/cuda/parallel-thread-execution/index.html#fundamental-types
Differential Revision: https://reviews.llvm.org/D34555
Patch by: Denys Zariaiev (denys.zariaiev@gmail.com)
llvm-svn: 308675
Diffstat (limited to 'llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp')
-rw-r--r-- | llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp b/llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp index 2b6ba8c85d4..ac21563ee9a 100644 --- a/llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp +++ b/llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp @@ -81,7 +81,7 @@ static std::string computeDataLayout(bool is64Bit) { if (!is64Bit) Ret += "-p:32:32"; - Ret += "-i64:64-v16:16-v32:32-n16:32:64"; + Ret += "-i64:64-i128:128-v16:16-v32:32-n16:32:64"; return Ret; } |