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author | Artem Belevich <tra@google.com> | 2018-05-09 23:46:19 +0000 |
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committer | Artem Belevich <tra@google.com> | 2018-05-09 23:46:19 +0000 |
commit | 2f348ea1c75646d98b9079fae527c6e600a2beb1 (patch) | |
tree | 4ca42d9190e9bd34f6d1dcfd69353168ffe5066d /llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp | |
parent | c779388c7bfbdd38b31923aea1ccb4cd35ca23b6 (diff) | |
download | bcm5719-llvm-2f348ea1c75646d98b9079fae527c6e600a2beb1.tar.gz bcm5719-llvm-2f348ea1c75646d98b9079fae527c6e600a2beb1.zip |
[NVPTX] Added a feature to use short pointers for const/local/shared AS.
Const/local/shared address spaces are all < 4GB and we can always use
32-bit pointers to access them. This has substantial performance impact
on kernels that uses shared memory for intermediary results.
The feature is disabled by default.
Differential Revision: https://reviews.llvm.org/D46147
llvm-svn: 331941
Diffstat (limited to 'llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp')
-rw-r--r-- | llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp | 18 |
1 files changed, 14 insertions, 4 deletions
diff --git a/llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp b/llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp index a3cd99e37cb..a1b160441df 100644 --- a/llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp +++ b/llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp @@ -52,6 +52,12 @@ static cl::opt<bool> DisableRequireStructuredCFG( "unexpected regressions happen."), cl::init(false), cl::Hidden); +static cl::opt<bool> UseShortPointersOpt( + "nvptx-short-ptr", + cl::desc( + "Use 32-bit pointers for accessing const/local/shared address spaces."), + cl::init(false), cl::Hidden); + namespace llvm { void initializeNVVMIntrRangePass(PassRegistry&); @@ -83,11 +89,13 @@ extern "C" void LLVMInitializeNVPTXTarget() { initializeNVPTXLowerAggrCopiesPass(PR); } -static std::string computeDataLayout(bool is64Bit) { +static std::string computeDataLayout(bool is64Bit, bool UseShortPointers) { std::string Ret = "e"; if (!is64Bit) Ret += "-p:32:32"; + else if (UseShortPointers) + Ret += "-p3:32:32-p4:32:32-p5:32:32"; Ret += "-i64:64-i128:128-v16:16-v32:32-n16:32:64"; @@ -108,9 +116,11 @@ NVPTXTargetMachine::NVPTXTargetMachine(const Target &T, const Triple &TT, CodeGenOpt::Level OL, bool is64bit) // The pic relocation model is used regardless of what the client has // specified, as it is the only relocation model currently supported. - : LLVMTargetMachine(T, computeDataLayout(is64bit), TT, CPU, FS, Options, - Reloc::PIC_, getEffectiveCodeModel(CM), OL), - is64bit(is64bit), TLOF(llvm::make_unique<NVPTXTargetObjectFile>()), + : LLVMTargetMachine(T, computeDataLayout(is64bit, UseShortPointersOpt), TT, + CPU, FS, Options, Reloc::PIC_, + getEffectiveCodeModel(CM), OL), + is64bit(is64bit), UseShortPointers(UseShortPointersOpt), + TLOF(llvm::make_unique<NVPTXTargetObjectFile>()), Subtarget(TT, CPU, FS, *this) { if (TT.getOS() == Triple::NVCL) drvInterface = NVPTX::NVCL; |