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authorJustin Holewinski <jholewinski@nvidia.com>2013-05-20 12:13:32 +0000
committerJustin Holewinski <jholewinski@nvidia.com>2013-05-20 12:13:32 +0000
commit01f89f04280141c016146f1878491b04ab0a8b6d (patch)
treeebabd8ecea4d818ad29a11ab4b6aaf3447bd4d43 /llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
parent700b6fa9349f988db24485fdd93d48c665409952 (diff)
downloadbcm5719-llvm-01f89f04280141c016146f1878491b04ab0a8b6d.tar.gz
bcm5719-llvm-01f89f04280141c016146f1878491b04ab0a8b6d.zip
[NVPTX] Add GenericToNVVM IR converter to better handle idiomatic LLVM IR inputs
This converter currently only handles global variables in address space 0. For these variables, they are promoted to address space 1 (global memory), and all uses are updated to point to the result of a cvta.global instruction on the new variable. The motivation for this is address space 0 global variables are illegal since we cannot declare variables in the generic address space. Instead, we place the variables in address space 1 and explicitly convert the pointer to address space 0. This is primarily intended to help new users who expect to be able to place global variables in the default address space. llvm-svn: 182254
Diffstat (limited to 'llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp')
-rw-r--r--llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp8
1 files changed, 8 insertions, 0 deletions
diff --git a/llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp b/llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
index 5f35edf2191..507fcb5d6af 100644
--- a/llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
+++ b/llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
@@ -49,6 +49,7 @@ using namespace llvm;
namespace llvm {
void initializeNVVMReflectPass(PassRegistry&);
+void initializeGenericToNVVMPass(PassRegistry&);
}
extern "C" void LLVMInitializeNVPTXTarget() {
@@ -62,6 +63,7 @@ extern "C" void LLVMInitializeNVPTXTarget() {
// FIXME: This pass is really intended to be invoked during IR optimization,
// but it's very NVPTX-specific.
initializeNVVMReflectPass(*PassRegistry::getPassRegistry());
+ initializeGenericToNVVMPass(*PassRegistry::getPassRegistry());
}
NVPTXTargetMachine::NVPTXTargetMachine(
@@ -102,6 +104,7 @@ public:
return getTM<NVPTXTargetMachine>();
}
+ virtual void addIRPasses();
virtual bool addInstSelector();
virtual bool addPreRegAlloc();
};
@@ -112,6 +115,11 @@ TargetPassConfig *NVPTXTargetMachine::createPassConfig(PassManagerBase &PM) {
return PassConfig;
}
+void NVPTXPassConfig::addIRPasses() {
+ TargetPassConfig::addIRPasses();
+ addPass(createGenericToNVVMPass());
+}
+
bool NVPTXPassConfig::addInstSelector() {
addPass(createLowerAggrCopies());
addPass(createSplitBBatBarPass());
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