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| author | Simon Atanasyan <simon@atanasyan.com> | 2018-02-12 11:15:37 +0000 |
|---|---|---|
| committer | Simon Atanasyan <simon@atanasyan.com> | 2018-02-12 11:15:37 +0000 |
| commit | dc4ed35ea6969a73d64af045d7c624e985d88f5e (patch) | |
| tree | ce757231d117e2f88c0e7f3f9202b81d5f157de5 /llvm/lib/Target/Mips | |
| parent | e54a20e094242799d55be50ac880321f7855851e (diff) | |
| download | bcm5719-llvm-dc4ed35ea6969a73d64af045d7c624e985d88f5e.tar.gz bcm5719-llvm-dc4ed35ea6969a73d64af045d7c624e985d88f5e.zip | |
[mips] Revert rL324869
This commit adds inlineasm-cnstrnt-bad-l.ll which is clashing
with inlineasm-cnstrnt-bad-L.ll on case insensitive file systems.
llvm-svn: 324882
Diffstat (limited to 'llvm/lib/Target/Mips')
| -rw-r--r-- | llvm/lib/Target/Mips/MipsISelLowering.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/Mips/MipsISelLowering.cpp b/llvm/lib/Target/Mips/MipsISelLowering.cpp index 3d383b3dfe3..ba05b0f48df 100644 --- a/llvm/lib/Target/Mips/MipsISelLowering.cpp +++ b/llvm/lib/Target/Mips/MipsISelLowering.cpp @@ -3868,7 +3868,7 @@ MipsTargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI, return std::make_pair(0U, nullptr); case 'l': // use the `lo` register to store values // that are no bigger than a word - if (VT == MVT::i32 || VT == MVT::i16 || VT == MVT::i8) + if (VT == MVT::i32) return std::make_pair((unsigned)Mips::LO0, &Mips::LO32RegClass); return std::make_pair((unsigned)Mips::LO0_64, &Mips::LO64RegClass); case 'x': // use the concatenated `hi` and `lo` registers |
