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authorBruno Cardoso Lopes <bruno.cardoso@gmail.com>2010-12-07 19:04:14 +0000
committerBruno Cardoso Lopes <bruno.cardoso@gmail.com>2010-12-07 19:04:14 +0000
commitb9bfd0945aaee4eef416ff6becec6154815d53e4 (patch)
treedfcac4d22782fa66eed3635244d2afd407db63bd /llvm/lib/Target/Mips
parentf0c6e3780d21c19e77a0e5238955c5927b1ac12d (diff)
downloadbcm5719-llvm-b9bfd0945aaee4eef416ff6becec6154815d53e4.tar.gz
bcm5719-llvm-b9bfd0945aaee4eef416ff6becec6154815d53e4.zip
Remove target specific node MipsISD::CMov, which is not used because all conditional moves are directly matched using tablegen patterns. If there's a need in the future, we can introduce it again
llvm-svn: 121164
Diffstat (limited to 'llvm/lib/Target/Mips')
-rw-r--r--llvm/lib/Target/Mips/MipsISelLowering.cpp1
-rw-r--r--llvm/lib/Target/Mips/MipsISelLowering.h3
-rw-r--r--llvm/lib/Target/Mips/MipsInstrInfo.td6
3 files changed, 1 insertions, 9 deletions
diff --git a/llvm/lib/Target/Mips/MipsISelLowering.cpp b/llvm/lib/Target/Mips/MipsISelLowering.cpp
index 5cf6e27433a..1f199efaafe 100644
--- a/llvm/lib/Target/Mips/MipsISelLowering.cpp
+++ b/llvm/lib/Target/Mips/MipsISelLowering.cpp
@@ -41,7 +41,6 @@ const char *MipsTargetLowering::getTargetNodeName(unsigned Opcode) const {
case MipsISD::Lo : return "MipsISD::Lo";
case MipsISD::GPRel : return "MipsISD::GPRel";
case MipsISD::Ret : return "MipsISD::Ret";
- case MipsISD::CMov : return "MipsISD::CMov";
case MipsISD::SelectCC : return "MipsISD::SelectCC";
case MipsISD::FPSelectCC : return "MipsISD::FPSelectCC";
case MipsISD::FPBrcond : return "MipsISD::FPBrcond";
diff --git a/llvm/lib/Target/Mips/MipsISelLowering.h b/llvm/lib/Target/Mips/MipsISelLowering.h
index 1e8cc80b642..54055bc9331 100644
--- a/llvm/lib/Target/Mips/MipsISelLowering.h
+++ b/llvm/lib/Target/Mips/MipsISelLowering.h
@@ -40,9 +40,6 @@ namespace llvm {
// Handle gp_rel (small data/bss sections) relocation.
GPRel,
- // Conditional Move
- CMov,
-
// Select CC Pseudo Instruction
SelectCC,
diff --git a/llvm/lib/Target/Mips/MipsInstrInfo.td b/llvm/lib/Target/Mips/MipsInstrInfo.td
index 6b95d1e1dd1..20feff903cb 100644
--- a/llvm/lib/Target/Mips/MipsInstrInfo.td
+++ b/llvm/lib/Target/Mips/MipsInstrInfo.td
@@ -52,9 +52,6 @@ def callseq_end : SDNode<"ISD::CALLSEQ_END", SDT_MipsCallSeqEnd,
// Select Condition Code
def MipsSelectCC : SDNode<"MipsISD::SelectCC", SDT_MipsSelectCC>;
-// Conditional Move
-def MipsCMov : SDNode<"MipsISD::CMov", SDT_MipsCMov>;
-
//===----------------------------------------------------------------------===//
// Mips Instruction Predicate Definitions.
//===----------------------------------------------------------------------===//
@@ -306,8 +303,7 @@ class ByteSwap<bits<6> func, string instr_asm>:
class CondMov<bits<6> func, string instr_asm, PatLeaf MovCode>:
FR<0x00, func, (outs CPURegs:$dst), (ins CPURegs:$F, CPURegs:$T,
CPURegs:$cond), !strconcat(instr_asm, "\t$dst, $T, $cond"),
- [(set CPURegs:$dst, (MipsCMov CPURegs:$F, CPURegs:$T,
- CPURegs:$cond, MovCode))], NoItinerary>;
+ [], NoItinerary>;
//===----------------------------------------------------------------------===//
// Pseudo instructions
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