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authorDaniel Sanders <daniel.sanders@imgtec.com>2016-07-26 14:46:11 +0000
committerDaniel Sanders <daniel.sanders@imgtec.com>2016-07-26 14:46:11 +0000
commit94ed30a40132764010bf721d9136bd0e15b06c23 (patch)
treec9b80f6417526bf23a5970ba171cf810877ef670 /llvm/lib/Target/Mips
parent9d01ef97efcb46f273f1552a748bf0aa18311268 (diff)
downloadbcm5719-llvm-94ed30a40132764010bf721d9136bd0e15b06c23.tar.gz
bcm5719-llvm-94ed30a40132764010bf721d9136bd0e15b06c23.zip
[mips] Fix typos in spelling of lowerRETURNADDR.
The first letter was mistakenly capitalized. llvm-svn: 276753
Diffstat (limited to 'llvm/lib/Target/Mips')
-rw-r--r--llvm/lib/Target/Mips/Mips16FrameLowering.cpp2
-rw-r--r--llvm/lib/Target/Mips/Mips16InstrInfo.cpp2
-rw-r--r--llvm/lib/Target/Mips/MipsSEFrameLowering.cpp2
3 files changed, 3 insertions, 3 deletions
diff --git a/llvm/lib/Target/Mips/Mips16FrameLowering.cpp b/llvm/lib/Target/Mips/Mips16FrameLowering.cpp
index e937ffa7a7a..55a762c8399 100644
--- a/llvm/lib/Target/Mips/Mips16FrameLowering.cpp
+++ b/llvm/lib/Target/Mips/Mips16FrameLowering.cpp
@@ -120,7 +120,7 @@ spillCalleeSavedRegisters(MachineBasicBlock &MBB,
for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
// Add the callee-saved register as live-in. Do not add if the register is
// RA and return address is taken, because it has already been added in
- // method MipsTargetLowering::LowerRETURNADDR.
+ // method MipsTargetLowering::lowerRETURNADDR.
// It's killed at the spill, unless the register is RA and return address
// is taken.
unsigned Reg = CSI[i].getReg();
diff --git a/llvm/lib/Target/Mips/Mips16InstrInfo.cpp b/llvm/lib/Target/Mips/Mips16InstrInfo.cpp
index daa1355ffef..98541ba35d0 100644
--- a/llvm/lib/Target/Mips/Mips16InstrInfo.cpp
+++ b/llvm/lib/Target/Mips/Mips16InstrInfo.cpp
@@ -172,7 +172,7 @@ static void addSaveRestoreRegs(MachineInstrBuilder &MIB,
for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
// Add the callee-saved register as live-in. Do not add if the register is
// RA and return address is taken, because it has already been added in
- // method MipsTargetLowering::LowerRETURNADDR.
+ // method MipsTargetLowering::lowerRETURNADDR.
// It's killed at the spill, unless the register is RA and return address
// is taken.
unsigned Reg = CSI[e-i-1].getReg();
diff --git a/llvm/lib/Target/Mips/MipsSEFrameLowering.cpp b/llvm/lib/Target/Mips/MipsSEFrameLowering.cpp
index a7ddd775273..9dd5150f64f 100644
--- a/llvm/lib/Target/Mips/MipsSEFrameLowering.cpp
+++ b/llvm/lib/Target/Mips/MipsSEFrameLowering.cpp
@@ -778,7 +778,7 @@ spillCalleeSavedRegisters(MachineBasicBlock &MBB,
for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
// Add the callee-saved register as live-in. Do not add if the register is
// RA and return address is taken, because it has already been added in
- // method MipsTargetLowering::LowerRETURNADDR.
+ // method MipsTargetLowering::lowerRETURNADDR.
// It's killed at the spill, unless the register is RA and return address
// is taken.
unsigned Reg = CSI[i].getReg();
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