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authorSimon Dardis <simon.dardis@imgtec.com>2016-06-23 09:06:20 +0000
committerSimon Dardis <simon.dardis@imgtec.com>2016-06-23 09:06:20 +0000
commit724e53029660c705441a405a254073c6d6ee9bc6 (patch)
treec45af91db6169929786ed7134a408676bbe080ff /llvm/lib/Target/Mips
parent19f877c3f2625188b73e77635a409a8ab925ca11 (diff)
downloadbcm5719-llvm-724e53029660c705441a405a254073c6d6ee9bc6.tar.gz
bcm5719-llvm-724e53029660c705441a405a254073c6d6ee9bc6.zip
[mips] Fix dext/dins definitions
dext and dins, along with their 'm' and 'u' variants are defined in mips64r2, not mips64. Reviewers: dsanders, vkalintiris Differential Review: http://reviews.llvm.org/D21608 llvm-svn: 273549
Diffstat (limited to 'llvm/lib/Target/Mips')
-rw-r--r--llvm/lib/Target/Mips/Mips64InstrInfo.td14
1 files changed, 8 insertions, 6 deletions
diff --git a/llvm/lib/Target/Mips/Mips64InstrInfo.td b/llvm/lib/Target/Mips/Mips64InstrInfo.td
index 68774e5ff96..21e34d83e83 100644
--- a/llvm/lib/Target/Mips/Mips64InstrInfo.td
+++ b/llvm/lib/Target/Mips/Mips64InstrInfo.td
@@ -308,17 +308,19 @@ let AdditionalPredicates = [NotInMicroMips] in {
// The 'pos + size' constraints are enforced by the code that lowers into
// MipsISD::Ext.
def DEXT : ExtBase<"dext", GPR64Opnd, uimm5_report_uimm6, uimm5_plus1,
- immZExt5, immZExt5Plus1, MipsExt>, EXT_FM<3>;
+ immZExt5, immZExt5Plus1, MipsExt>, EXT_FM<3>,
+ ISA_MIPS64R2;
def DEXTM : ExtBase<"dextm", GPR64Opnd, uimm5, uimm5_plus33, immZExt5,
- immZExt5Plus33, MipsExt>, EXT_FM<1>;
+ immZExt5Plus33, MipsExt>, EXT_FM<1>, ISA_MIPS64R2;
def DEXTU : ExtBase<"dextu", GPR64Opnd, uimm5_plus32, uimm5_plus1,
- immZExt5Plus32, immZExt5Plus1, MipsExt>, EXT_FM<2>;
+ immZExt5Plus32, immZExt5Plus1, MipsExt>, EXT_FM<2>,
+ ISA_MIPS64R2;
def DINS : InsBase<"dins", GPR64Opnd, uimm6, uimm5_inssize_plus1, MipsIns>,
- EXT_FM<7>;
+ EXT_FM<7>, ISA_MIPS64R2;
def DINSU : InsBase<"dinsu", GPR64Opnd, uimm5_plus32, uimm5_inssize_plus1>,
- EXT_FM<6>;
+ EXT_FM<6>, ISA_MIPS64R2;
def DINSM : InsBase<"dinsm", GPR64Opnd, uimm5, uimm5_inssize_plus1>,
- EXT_FM<5>;
+ EXT_FM<5>, ISA_MIPS64R2;
}
let isCodeGenOnly = 1, rs = 0, shamt = 0 in {
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