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authorSimon Dardis <simon.dardis@mips.com>2017-12-06 12:42:49 +0000
committerSimon Dardis <simon.dardis@mips.com>2017-12-06 12:42:49 +0000
commit515f42cbaab3597d17d0e4bc16c05b4837c727a8 (patch)
treeca718aaea6956d9904e3c819c95cc4c8c1b2a985 /llvm/lib/Target/Mips
parentbfe969c49b5bd772d12d4d2a118f0425224579f5 (diff)
downloadbcm5719-llvm-515f42cbaab3597d17d0e4bc16c05b4837c727a8.tar.gz
bcm5719-llvm-515f42cbaab3597d17d0e4bc16c05b4837c727a8.zip
[mips] Fix definition of 'bc' instruction
llvm-svn: 319888
Diffstat (limited to 'llvm/lib/Target/Mips')
-rw-r--r--llvm/lib/Target/Mips/Mips32r6InstrInfo.td4
1 files changed, 1 insertions, 3 deletions
diff --git a/llvm/lib/Target/Mips/Mips32r6InstrInfo.td b/llvm/lib/Target/Mips/Mips32r6InstrInfo.td
index 28b911e69be..62f045e77fd 100644
--- a/llvm/lib/Target/Mips/Mips32r6InstrInfo.td
+++ b/llvm/lib/Target/Mips/Mips32r6InstrInfo.td
@@ -822,9 +822,7 @@ let AdditionalPredicates = [NotInMicroMips] in {
def BC1NEZ : BC1NEZ_ENC, BC1NEZ_DESC, ISA_MIPS32R6, HARDFLOAT;
def BC2EQZ : BC2EQZ_ENC, BC2EQZ_DESC, ISA_MIPS32R6;
def BC2NEZ : BC2NEZ_ENC, BC2NEZ_DESC, ISA_MIPS32R6;
-}
-def BC : R6MMR6Rel, BC_ENC, BC_DESC, ISA_MIPS32R6;
-let AdditionalPredicates = [NotInMicroMips] in {
+ def BC : R6MMR6Rel, BC_ENC, BC_DESC, ISA_MIPS32R6;
def BEQC : R6MMR6Rel, BEQC_ENC, BEQC_DESC, ISA_MIPS32R6;
def BEQZALC : R6MMR6Rel, BEQZALC_ENC, BEQZALC_DESC, ISA_MIPS32R6;
def BEQZC : R6MMR6Rel, BEQZC_ENC, BEQZC_DESC, ISA_MIPS32R6;
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