[mips][msa] Added partial support for matching fmax_a from normal IR (i.e. not intrinsics)

This covers the case where fmax_a can be used to implement ISD::FABS.

llvm-svn: 191296

2 files changed, 15 insertions, 0 deletions

diff --git a/llvm/lib/Target/Mips/MipsMSAInstrInfo.td b/llvm/lib/Target/Mips/MipsMSAInstrInfo.td
index d0dbb152112..959c05aa0a9 100644
--- a/llvm/lib/Target/Mips/MipsMSAInstrInfo.td
+++ b/llvm/lib/Target/Mips/MipsMSAInstrInfo.td
@@ -2946,6 +2946,20 @@ def ST_FW : MSAPat<(store (v4f32 MSA128W:$ws), addrRegImm:$addr),
 def ST_FD : MSAPat<(store (v2f64 MSA128D:$ws), addrRegImm:$addr),
                    (ST_D MSA128D:$ws, addrRegImm:$addr)>;
 
+class MSA_FABS_PSEUDO_DESC_BASE<RegisterClass RCWD, RegisterClass RCWS = RCWD,
+                                InstrItinClass itin = NoItinerary> :
+  MipsPseudo<(outs RCWD:$wd),
+             (ins RCWS:$ws),
+             [(set RCWD:$wd, (fabs RCWS:$ws))]> {
+  InstrItinClass Itinerary = itin;
+}
+def FABS_W : MSA_FABS_PSEUDO_DESC_BASE<MSA128W>,
+             PseudoInstExpansion<(FMAX_A_W MSA128W:$wd, MSA128W:$ws,
+                                           MSA128W:$ws)>;
+def FABS_D : MSA_FABS_PSEUDO_DESC_BASE<MSA128D>,
+             PseudoInstExpansion<(FMAX_A_D MSA128D:$wd, MSA128D:$ws,
+                                           MSA128D:$ws)>;
+
 class MSABitconvertPat<ValueType DstVT, ValueType SrcVT,
                        RegisterClass DstRC, list<Predicate> preds = [HasMSA]> :
    MSAPat<(DstVT (bitconvert SrcVT:$src)),
diff --git a/llvm/lib/Target/Mips/MipsSEISelLowering.cpp b/llvm/lib/Target/Mips/MipsSEISelLowering.cpp
index ef2217c56ac..30774540eeb 100644
--- a/llvm/lib/Target/Mips/MipsSEISelLowering.cpp
+++ b/llvm/lib/Target/Mips/MipsSEISelLowering.cpp
@@ -206,6 +206,7 @@ addMSAFloatType(MVT::SimpleValueType Ty, const TargetRegisterClass *RC) {
   setOperationAction(ISD::EXTRACT_VECTOR_ELT, Ty, Legal);
 
   if (Ty != MVT::v8f16) {
+    setOperationAction(ISD::FABS,  Ty, Legal);
     setOperationAction(ISD::FADD,  Ty, Legal);
     setOperationAction(ISD::FDIV,  Ty, Legal);
     setOperationAction(ISD::FLOG2, Ty, Legal);