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| author | Alex Richardson <Alexander.Richardson@cl.cam.ac.uk> | 2019-12-04 10:06:24 +0000 |
|---|---|---|
| committer | Alex Richardson <Alexander.Richardson@cl.cam.ac.uk> | 2019-12-04 11:30:00 +0000 |
| commit | 39b534da188063e9b561a272a48ecdc803d3f40e (patch) | |
| tree | 81bd6d71c06ace97cb2b0fc75d97bfa59b28b770 /llvm/lib/Target/Mips | |
| parent | b5f69e234ef0af43fa4b86d9977d46e0a4e442e7 (diff) | |
| download | bcm5719-llvm-39b534da188063e9b561a272a48ecdc803d3f40e.tar.gz bcm5719-llvm-39b534da188063e9b561a272a48ecdc803d3f40e.zip | |
Allow negative offsets in MipsMCInstLower::LowerOperand
Summary:
We rely on this in our CHERI backend to address the GOT by generating a
$pc-relative addresses. For this we emit the following code sequence:
lui $1, %pcrel_hi(_CHERI_CAPABILITY_TABLE_-8)
daddiu $1, $1, %pcrel_lo(_CHERI_CAPABILITY_TABLE_-4)
cgetpccincoffset $c1, $1
However, without this change the addend is implicitly converted to
UINT32_MAX and an invalid pointer value is generated.
Reviewers: atanasyan
Reviewed By: atanasyan
Subscribers: merge_guards_bot, sdardis, hiraditya, jrtc27, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D70953
Diffstat (limited to 'llvm/lib/Target/Mips')
| -rw-r--r-- | llvm/lib/Target/Mips/MipsMCInstLower.cpp | 8 | ||||
| -rw-r--r-- | llvm/lib/Target/Mips/MipsMCInstLower.h | 4 |
2 files changed, 5 insertions, 7 deletions
diff --git a/llvm/lib/Target/Mips/MipsMCInstLower.cpp b/llvm/lib/Target/Mips/MipsMCInstLower.cpp index fd984058a2b..66e04bda2af 100644 --- a/llvm/lib/Target/Mips/MipsMCInstLower.cpp +++ b/llvm/lib/Target/Mips/MipsMCInstLower.cpp @@ -34,7 +34,7 @@ void MipsMCInstLower::Initialize(MCContext *C) { MCOperand MipsMCInstLower::LowerSymbolOperand(const MachineOperand &MO, MachineOperandType MOTy, - unsigned Offset) const { + int64_t Offset) const { MCSymbolRefExpr::VariantKind Kind = MCSymbolRefExpr::VK_None; MipsMCExpr::MipsExprKind TargetKind = MipsMCExpr::MEK_None; bool IsGpOff = false; @@ -161,9 +161,7 @@ MCOperand MipsMCInstLower::LowerSymbolOperand(const MachineOperand &MO, const MCExpr *Expr = MCSymbolRefExpr::create(Symbol, Kind, *Ctx); if (Offset) { - // Assume offset is never negative. - assert(Offset > 0); - + // Note: Offset can also be negative Expr = MCBinaryExpr::createAdd(Expr, MCConstantExpr::create(Offset, *Ctx), *Ctx); } @@ -177,7 +175,7 @@ MCOperand MipsMCInstLower::LowerSymbolOperand(const MachineOperand &MO, } MCOperand MipsMCInstLower::LowerOperand(const MachineOperand &MO, - unsigned offset) const { + int64_t offset) const { MachineOperandType MOTy = MO.getType(); switch (MOTy) { diff --git a/llvm/lib/Target/Mips/MipsMCInstLower.h b/llvm/lib/Target/Mips/MipsMCInstLower.h index 29af6f21de8..605a124bf10 100644 --- a/llvm/lib/Target/Mips/MipsMCInstLower.h +++ b/llvm/lib/Target/Mips/MipsMCInstLower.h @@ -35,11 +35,11 @@ public: void Initialize(MCContext *C); void Lower(const MachineInstr *MI, MCInst &OutMI) const; - MCOperand LowerOperand(const MachineOperand& MO, unsigned offset = 0) const; + MCOperand LowerOperand(const MachineOperand &MO, int64_t offset = 0) const; private: MCOperand LowerSymbolOperand(const MachineOperand &MO, - MachineOperandType MOTy, unsigned Offset) const; + MachineOperandType MOTy, int64_t Offset) const; MCOperand createSub(MachineBasicBlock *BB1, MachineBasicBlock *BB2, MipsMCExpr::MipsExprKind Kind) const; void lowerLongBranchLUi(const MachineInstr *MI, MCInst &OutMI) const; |

