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| author | Diana Picus <diana.picus@linaro.org> | 2017-01-13 09:58:52 +0000 |
|---|---|---|
| committer | Diana Picus <diana.picus@linaro.org> | 2017-01-13 09:58:52 +0000 |
| commit | 116bbab4e4f440364bdaa900bc70d6c262a0b973 (patch) | |
| tree | e3dc7375d120e028e5e16212b47cadf53753c87c /llvm/lib/Target/Mips | |
| parent | 4f8c3e18824278a2fc59f273af5793ee8d5e2618 (diff) | |
| download | bcm5719-llvm-116bbab4e4f440364bdaa900bc70d6c262a0b973.tar.gz bcm5719-llvm-116bbab4e4f440364bdaa900bc70d6c262a0b973.zip | |
[CodeGen] Rename MachineInstrBuilder::addOperand. NFC
Rename from addOperand to just add, to match the other method that has been
added to MachineInstrBuilder for adding more than just 1 operand.
See https://reviews.llvm.org/D28057 for the whole discussion.
Differential Revision: https://reviews.llvm.org/D28556
llvm-svn: 291891
Diffstat (limited to 'llvm/lib/Target/Mips')
| -rw-r--r-- | llvm/lib/Target/Mips/MipsInstrInfo.cpp | 4 | ||||
| -rw-r--r-- | llvm/lib/Target/Mips/MipsSEISelLowering.cpp | 2 |
2 files changed, 3 insertions, 3 deletions
diff --git a/llvm/lib/Target/Mips/MipsInstrInfo.cpp b/llvm/lib/Target/Mips/MipsInstrInfo.cpp index 19af1914c81..86bf1037118 100644 --- a/llvm/lib/Target/Mips/MipsInstrInfo.cpp +++ b/llvm/lib/Target/Mips/MipsInstrInfo.cpp @@ -482,7 +482,7 @@ MipsInstrInfo::genInstrWithNewOpc(unsigned NewOpc, MIB->RemoveOperand(0); for (unsigned J = 0, E = I->getDesc().getNumOperands(); J < E; ++J) { - MIB.addOperand(I->getOperand(J)); + MIB.add(I->getOperand(J)); } MIB.addImm(0); @@ -492,7 +492,7 @@ MipsInstrInfo::genInstrWithNewOpc(unsigned NewOpc, if (BranchWithZeroOperand && (unsigned)ZeroOperandPosition == J) continue; - MIB.addOperand(I->getOperand(J)); + MIB.add(I->getOperand(J)); } } diff --git a/llvm/lib/Target/Mips/MipsSEISelLowering.cpp b/llvm/lib/Target/Mips/MipsSEISelLowering.cpp index f28e8b36fdb..69162d4f6e8 100644 --- a/llvm/lib/Target/Mips/MipsSEISelLowering.cpp +++ b/llvm/lib/Target/Mips/MipsSEISelLowering.cpp @@ -3628,7 +3628,7 @@ MipsSETargetLowering::emitLD_F16_PSEUDO(MachineInstr &MI, MachineInstrBuilder MIB = BuildMI(*BB, MI, DL, TII->get(UsingMips32 ? Mips::LH : Mips::LH64), Rt); for (unsigned i = 1; i < MI.getNumOperands(); i++) - MIB.addOperand(MI.getOperand(i)); + MIB.add(MI.getOperand(i)); BuildMI(*BB, MI, DL, TII->get(Mips::FILL_H), Wd).addReg(Rt); |

