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| author | Akira Hatanaka <ahatanaka@mips.com> | 2012-09-14 03:21:56 +0000 |
|---|---|---|
| committer | Akira Hatanaka <ahatanaka@mips.com> | 2012-09-14 03:21:56 +0000 |
| commit | 0fbaec224693e3690c274338d50a158bcc814a2a (patch) | |
| tree | 211799ef6e5c012d48080bd9f264d1d21464b868 /llvm/lib/Target/Mips | |
| parent | c1b1f1ea26f50eb0beb75c9fbf794f51d328b493 (diff) | |
| download | bcm5719-llvm-0fbaec224693e3690c274338d50a158bcc814a2a.tar.gz bcm5719-llvm-0fbaec224693e3690c274338d50a158bcc814a2a.zip | |
mips16 fixes.
1. Add MoveR3216
2. Correct spelling for Move32R16
Patch by Reed Kotler.
llvm-svn: 163869
Diffstat (limited to 'llvm/lib/Target/Mips')
| -rw-r--r-- | llvm/lib/Target/Mips/Mips16InstrInfo.cpp | 2 | ||||
| -rw-r--r-- | llvm/lib/Target/Mips/Mips16InstrInfo.td | 16 |
2 files changed, 16 insertions, 2 deletions
diff --git a/llvm/lib/Target/Mips/Mips16InstrInfo.cpp b/llvm/lib/Target/Mips/Mips16InstrInfo.cpp index ec84ad81f55..9248032340e 100644 --- a/llvm/lib/Target/Mips/Mips16InstrInfo.cpp +++ b/llvm/lib/Target/Mips/Mips16InstrInfo.cpp @@ -62,7 +62,7 @@ void Mips16InstrInfo::copyPhysReg(MachineBasicBlock &MBB, if (Mips::CPURegsRegClass.contains(DestReg)) { // Copy to CPU Reg. if (Mips::CPURegsRegClass.contains(SrcReg)) - Opc = Mips::Mov32R16; + Opc = Mips::Move32R16; } assert(Opc && "Cannot copy registers"); diff --git a/llvm/lib/Target/Mips/Mips16InstrInfo.td b/llvm/lib/Target/Mips/Mips16InstrInfo.td index 94cf984769b..692ef29c09e 100644 --- a/llvm/lib/Target/Mips/Mips16InstrInfo.td +++ b/llvm/lib/Target/Mips/Mips16InstrInfo.td @@ -20,6 +20,13 @@ class FRRR16_ins<bits<2> _f, string asmstr, InstrItinClass itin> : !strconcat(asmstr, "\t$rz, $rx, $ry"), [], itin>; // +// I8_MOVR32 instruction format (used only by the MOVR32 instructio +// +class FI8_MOVR3216_ins<string asmstr, InstrItinClass itin>: + FI8_MOVR3216<(outs CPU16Regs:$rz), (ins CPURegs:$r32), + !strconcat(asmstr, "\t$rz, $r32"), [], itin>; + +// // I8_MOV32R instruction format (used only by MOV32R instruction) // class FI8_MOV32R16_ins<string asmstr, InstrItinClass itin>: @@ -204,7 +211,14 @@ def LwRxRyOffMemX16: FEXT_RRI16_mem_ins<0b10011, "lw", mem16, IIAlu>; // Purpose: Move // To move the contents of a GPR to a GPR. // -def Mov32R16: FI8_MOV32R16_ins<"move", IIAlu>; +def Move32R16: FI8_MOV32R16_ins<"move", IIAlu>; + +// +// Format: MOVE ry, r32 MIPS16e +//Purpose: Move +// To move the contents of a GPR to a GPR. +// +def MoveR3216: FI8_MOVR3216_ins<"move", IIAlu>; // // Format: NEG rx, ry MIPS16e |
