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| author | James Molloy <james.molloy@arm.com> | 2014-07-23 13:33:00 +0000 |
|---|---|---|
| committer | James Molloy <james.molloy@arm.com> | 2014-07-23 13:33:00 +0000 |
| commit | bc9fed82ccf8ae255b3c53c62a31292192d0fd15 (patch) | |
| tree | b90b0af431b7ede3d05d390d627e4c033eb6d1ca /llvm/lib/Target/Mips/MipsTargetMachine.cpp | |
| parent | 3dfa09bbbc07134da15cdf57928a67f85dc966ab (diff) | |
| download | bcm5719-llvm-bc9fed82ccf8ae255b3c53c62a31292192d0fd15.tar.gz bcm5719-llvm-bc9fed82ccf8ae255b3c53c62a31292192d0fd15.zip | |
Enable partial libcall inlining for all targets by default.
This pass attempts to speculatively use a sqrt instruction if one exists on the target, falling back to a libcall if the target instruction returned NaN.
This was enabled for MIPS and System-Z, but is well guarded and is good for most targets - GCC does this for (that I've checked) X86, ARM and AArch64.
llvm-svn: 213752
Diffstat (limited to 'llvm/lib/Target/Mips/MipsTargetMachine.cpp')
| -rw-r--r-- | llvm/lib/Target/Mips/MipsTargetMachine.cpp | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/llvm/lib/Target/Mips/MipsTargetMachine.cpp b/llvm/lib/Target/Mips/MipsTargetMachine.cpp index bb1870ebe60..d9856dc15e1 100644 --- a/llvm/lib/Target/Mips/MipsTargetMachine.cpp +++ b/llvm/lib/Target/Mips/MipsTargetMachine.cpp @@ -141,7 +141,6 @@ void MipsPassConfig::addIRPasses() { addPass(createMipsOs16(getMipsTargetMachine())); if (getMipsSubtarget().inMips16HardFloat()) addPass(createMips16HardFloat(getMipsTargetMachine())); - addPass(createPartiallyInlineLibCallsPass()); } // Install an instruction selector pass using // the ISelDag to gen Mips code. |
