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| author | Chris Lattner <sabre@nondot.org> | 2010-01-20 06:34:14 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2010-01-20 06:34:14 +0000 |
| commit | 2b4364fe030894b65eededb3c7cfba4f50da2d51 (patch) | |
| tree | 1cece84d86b7a6de8b8b4bc39f5fe1ee9ba61060 /llvm/lib/Target/Mips/MipsTargetMachine.cpp | |
| parent | d0b2ff9b7a11d9df9a7b078a0042c2eacf44d361 (diff) | |
| download | bcm5719-llvm-2b4364fe030894b65eededb3c7cfba4f50da2d51.tar.gz bcm5719-llvm-2b4364fe030894b65eededb3c7cfba4f50da2d51.zip | |
revert 93934, removing the MCAsmInfo endianness bit. I can't
stomache MCAsmInfo having this, and I found a better solution to
this layering issue.
llvm-svn: 93985
Diffstat (limited to 'llvm/lib/Target/Mips/MipsTargetMachine.cpp')
| -rw-r--r-- | llvm/lib/Target/Mips/MipsTargetMachine.cpp | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/llvm/lib/Target/Mips/MipsTargetMachine.cpp b/llvm/lib/Target/Mips/MipsTargetMachine.cpp index 1168fef66e0..4724ff7d347 100644 --- a/llvm/lib/Target/Mips/MipsTargetMachine.cpp +++ b/llvm/lib/Target/Mips/MipsTargetMachine.cpp @@ -22,8 +22,8 @@ extern "C" void LLVMInitializeMipsTarget() { // Register the target. RegisterTargetMachine<MipsTargetMachine> X(TheMipsTarget); RegisterTargetMachine<MipselTargetMachine> Y(TheMipselTarget); - RegisterAsmInfo<MipsBEMCAsmInfo> A(TheMipsTarget); - RegisterAsmInfo<MipsLEMCAsmInfo> B(TheMipselTarget); + RegisterAsmInfo<MipsMCAsmInfo> A(TheMipsTarget); + RegisterAsmInfo<MipsMCAsmInfo> B(TheMipselTarget); } // DataLayout --> Big-endian, 32-bit pointer/ABI/alignment @@ -60,7 +60,8 @@ MipselTargetMachine(const Target &T, const std::string &TT, // Install an instruction selector pass using // the ISelDag to gen Mips code. bool MipsTargetMachine:: -addInstSelector(PassManagerBase &PM, CodeGenOpt::Level OptLevel) { +addInstSelector(PassManagerBase &PM, CodeGenOpt::Level OptLevel) +{ PM.add(createMipsISelDag(*this)); return false; } |
