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authorSimon Dardis <simon.dardis@mips.com>2017-11-20 15:59:18 +0000
committerSimon Dardis <simon.dardis@mips.com>2017-11-20 15:59:18 +0000
commit1631d6ce13037e11bd6a740f317ae87158bc62c6 (patch)
treee563efe1097b29f0a3d3b35c284d7e31c84d985b /llvm/lib/Target/Mips/MipsTargetMachine.cpp
parentd642494828e4fa22e7b82556c5e040b2320dc72c (diff)
downloadbcm5719-llvm-1631d6ce13037e11bd6a740f317ae87158bc62c6.tar.gz
bcm5719-llvm-1631d6ce13037e11bd6a740f317ae87158bc62c6.zip
[mips] Reorder target specific passes
Move the hazard scheduling pass to after the long branch pass, as the long branch pass can create forbiddden slot hazards. Rather than complicating the implementation of the long branch pass to handle forbidden slot hazards, just reorder the passes. llvm-svn: 318657
Diffstat (limited to 'llvm/lib/Target/Mips/MipsTargetMachine.cpp')
-rw-r--r--llvm/lib/Target/Mips/MipsTargetMachine.cpp9
1 files changed, 4 insertions, 5 deletions
diff --git a/llvm/lib/Target/Mips/MipsTargetMachine.cpp b/llvm/lib/Target/Mips/MipsTargetMachine.cpp
index 6199ffd789c..9a12b98984e 100644
--- a/llvm/lib/Target/Mips/MipsTargetMachine.cpp
+++ b/llvm/lib/Target/Mips/MipsTargetMachine.cpp
@@ -278,12 +278,11 @@ TargetIRAnalysis MipsTargetMachine::getTargetIRAnalysis() {
void MipsPassConfig::addPreEmitPass() {
addPass(createMicroMipsSizeReductionPass());
- // The delay slot filler pass can potientially create forbidden slot (FS)
- // hazards for MIPSR6 which the hazard schedule pass (HSP) will fix. Any
- // (new) pass that creates compact branches after the HSP must handle FS
- // hazards itself or be pipelined before the HSP.
+ // The delay slot filler and the long branch passes can potientially create
+ // forbidden slot/ hazards for MIPSR6 which the hazard schedule pass will
+ // fix. Any new pass must come before the hazard schedule pass.
addPass(createMipsDelaySlotFillerPass());
- addPass(createMipsHazardSchedule());
addPass(createMipsLongBranchPass());
+ addPass(createMipsHazardSchedule());
addPass(createMipsConstantIslandPass());
}
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