diff options
| author | Toma Tabacu <toma.tabacu@imgtec.com> | 2015-05-07 10:29:52 +0000 |
|---|---|---|
| committer | Toma Tabacu <toma.tabacu@imgtec.com> | 2015-05-07 10:29:52 +0000 |
| commit | 506cfd0b2b9d65d584aaff2e8ac69ca76beb1f54 (patch) | |
| tree | 9a5bee5c05d0f9ba7a27ccc0f11db50aedd24b5c /llvm/lib/Target/Mips/MipsSubtarget.cpp | |
| parent | 2ce89617c9f9bb536cdf2366082e20b86ba9e2b9 (diff) | |
| download | bcm5719-llvm-506cfd0b2b9d65d584aaff2e8ac69ca76beb1f54.tar.gz bcm5719-llvm-506cfd0b2b9d65d584aaff2e8ac69ca76beb1f54.zip | |
[mips] Add the SoftFloat MipsSubtarget feature.
Summary: This will enable the IAS to reject floating point instructions if soft-float is enabled.
Reviewers: dsanders, echristo
Reviewed By: dsanders
Subscribers: jfb, llvm-commits, mpf
Differential Revision: http://reviews.llvm.org/D9053
llvm-svn: 236713
Diffstat (limited to 'llvm/lib/Target/Mips/MipsSubtarget.cpp')
| -rw-r--r-- | llvm/lib/Target/Mips/MipsSubtarget.cpp | 16 |
1 files changed, 6 insertions, 10 deletions
diff --git a/llvm/lib/Target/Mips/MipsSubtarget.cpp b/llvm/lib/Target/Mips/MipsSubtarget.cpp index 26f39a2aa99..7ea10eb954f 100644 --- a/llvm/lib/Target/Mips/MipsSubtarget.cpp +++ b/llvm/lib/Target/Mips/MipsSubtarget.cpp @@ -63,11 +63,11 @@ MipsSubtarget::MipsSubtarget(const std::string &TT, const std::string &CPU, const std::string &FS, bool little, const MipsTargetMachine &TM) : MipsGenSubtargetInfo(TT, CPU, FS), MipsArchVersion(MipsDefault), - IsLittle(little), IsSingleFloat(false), IsFPXX(false), NoABICalls(false), - IsFP64bit(false), UseOddSPReg(true), IsNaN2008bit(false), - IsGP64bit(false), HasVFPU(false), HasCnMips(false), HasMips3_32(false), - HasMips3_32r2(false), HasMips4_32(false), HasMips4_32r2(false), - HasMips5_32r2(false), InMips16Mode(false), + IsLittle(little), IsSoftFloat(false), IsSingleFloat(false), IsFPXX(false), + NoABICalls(false), IsFP64bit(false), UseOddSPReg(true), + IsNaN2008bit(false), IsGP64bit(false), HasVFPU(false), HasCnMips(false), + HasMips3_32(false), HasMips3_32r2(false), HasMips4_32(false), + HasMips4_32r2(false), HasMips5_32r2(false), InMips16Mode(false), InMips16HardFloat(Mips16HardFloat), InMicroMipsMode(false), HasDSP(false), HasDSPR2(false), AllowMixed16_32(Mixed16_32 | Mips_Os16), Os16(Mips_Os16), HasMSA(false), TM(TM), TargetTriple(TT), TSInfo(*TM.getDataLayout()), @@ -148,16 +148,12 @@ MipsSubtarget::initializeSubtargetDependencies(StringRef CPU, StringRef FS, // Initialize scheduling itinerary for the specified CPU. InstrItins = getInstrItineraryForCPU(CPUName); - if (InMips16Mode && !TM.Options.UseSoftFloat) + if (InMips16Mode && !IsSoftFloat) InMips16HardFloat = true; return *this; } -bool MipsSubtarget::abiUsesSoftFloat() const { - return TM.Options.UseSoftFloat && !InMips16HardFloat; -} - bool MipsSubtarget::useConstantIslands() { DEBUG(dbgs() << "use constant islands " << Mips16ConstantIslands << "\n"); return Mips16ConstantIslands; |

