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author | Jack Carter <jack.carter@imgtec.com> | 2013-08-13 20:54:07 +0000 |
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committer | Jack Carter <jack.carter@imgtec.com> | 2013-08-13 20:54:07 +0000 |
commit | 3a2c2d42b85b657535dfb39e811045403ccdd195 (patch) | |
tree | 91733d18b2e193094e8d667b643f206c9fdec0aa /llvm/lib/Target/Mips/MipsSubtarget.cpp | |
parent | 9770097727c21d41fe966e7faef69140a72a49b7 (diff) | |
download | bcm5719-llvm-3a2c2d42b85b657535dfb39e811045403ccdd195.tar.gz bcm5719-llvm-3a2c2d42b85b657535dfb39e811045403ccdd195.zip |
[Mips][msa] Added initial MSA support.
* msa SubtargetFeature
* registers
* ld.[bhwd], and st.[bhwd] instructions
Does not correctly prohibit use of both 32-bit FPU registers and MSA together.
Patch by Daniel Sanders
llvm-svn: 188313
Diffstat (limited to 'llvm/lib/Target/Mips/MipsSubtarget.cpp')
-rw-r--r-- | llvm/lib/Target/Mips/MipsSubtarget.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/Mips/MipsSubtarget.cpp b/llvm/lib/Target/Mips/MipsSubtarget.cpp index 541e2ca4da9..e2e7e08d620 100644 --- a/llvm/lib/Target/Mips/MipsSubtarget.cpp +++ b/llvm/lib/Target/Mips/MipsSubtarget.cpp @@ -65,7 +65,7 @@ MipsSubtarget::MipsSubtarget(const std::string &TT, const std::string &CPU, HasBitCount(false), HasFPIdx(false), InMips16Mode(false), InMips16HardFloat(Mips16HardFloat), InMicroMipsMode(false), HasDSP(false), HasDSPR2(false), - AllowMixed16_32(Mixed16_32 | Mips_Os16), Os16(Mips_Os16), + AllowMixed16_32(Mixed16_32 | Mips_Os16), Os16(Mips_Os16), HasMSA(false), RM(_RM), OverrideMode(NoOverride), TM(_TM) { std::string CPUName = CPU; |