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| author | Daniel Sanders <daniel.sanders@imgtec.com> | 2014-01-21 14:50:20 +0000 |
|---|---|---|
| committer | Daniel Sanders <daniel.sanders@imgtec.com> | 2014-01-21 14:50:20 +0000 |
| commit | bf8aa22902e71b8d33b63548931544682e5855cc (patch) | |
| tree | bee18c6ca1030b30d745b4ef36e9a1320312547a /llvm/lib/Target/Mips/MipsSchedule.td | |
| parent | 7706107e6f6e17dfa8e1f2d85c44cd7430c32e52 (diff) | |
| download | bcm5719-llvm-bf8aa22902e71b8d33b63548931544682e5855cc.tar.gz bcm5719-llvm-bf8aa22902e71b8d33b63548931544682e5855cc.zip | |
[mips][sched] Split IIFStore into II_S[WD]C1, and II_S[WDU]XC1
No functional change since the InstrItinData's have been duplicated.
llvm-svn: 199747
Diffstat (limited to 'llvm/lib/Target/Mips/MipsSchedule.td')
| -rw-r--r-- | llvm/lib/Target/Mips/MipsSchedule.td | 12 |
1 files changed, 10 insertions, 2 deletions
diff --git a/llvm/lib/Target/Mips/MipsSchedule.td b/llvm/lib/Target/Mips/MipsSchedule.td index 0f9724d0538..b8b5292075c 100644 --- a/llvm/lib/Target/Mips/MipsSchedule.td +++ b/llvm/lib/Target/Mips/MipsSchedule.td @@ -20,7 +20,6 @@ def IIAlu : InstrItinClass; def IILoad : InstrItinClass; def IIStore : InstrItinClass; def IIBranch : InstrItinClass; -def IIFStore : InstrItinClass; def IIFmoveC1 : InstrItinClass; def IIPseudo : InstrItinClass; @@ -111,6 +110,8 @@ def II_RDHWR : InstrItinClass; def II_ROTR : InstrItinClass; def II_ROTRV : InstrItinClass; def II_ROUND : InstrItinClass; +def II_SDC1 : InstrItinClass; +def II_SDXC1 : InstrItinClass; def II_SEB : InstrItinClass; def II_SEH : InstrItinClass; def II_SLL : InstrItinClass; @@ -126,6 +127,9 @@ def II_SRLV : InstrItinClass; def II_SUBU : InstrItinClass; def II_SUB_D : InstrItinClass; def II_SUB_S : InstrItinClass; +def II_SUXC1 : InstrItinClass; +def II_SWC1 : InstrItinClass; +def II_SWXC1 : InstrItinClass; def II_TRUNC : InstrItinClass; def II_XOR : InstrItinClass; def II_XORI : InstrItinClass; @@ -237,6 +241,10 @@ def MipsGenericItineraries : ProcessorItineraries<[ALU, IMULDIV], [], [ InstrItinData<II_LDXC1 , [InstrStage<3, [ALU]>]>, InstrItinData<II_LWXC1 , [InstrStage<3, [ALU]>]>, InstrItinData<II_LUXC1 , [InstrStage<3, [ALU]>]>, - InstrItinData<IIFStore , [InstrStage<1, [ALU]>]>, + InstrItinData<II_SDC1 , [InstrStage<1, [ALU]>]>, + InstrItinData<II_SWC1 , [InstrStage<1, [ALU]>]>, + InstrItinData<II_SDXC1 , [InstrStage<1, [ALU]>]>, + InstrItinData<II_SWXC1 , [InstrStage<1, [ALU]>]>, + InstrItinData<II_SUXC1 , [InstrStage<1, [ALU]>]>, InstrItinData<IIFmoveC1 , [InstrStage<2, [ALU]>]> ]>; |
