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authorAkira Hatanaka <ahatanaka@mips.com>2013-05-16 19:57:23 +0000
committerAkira Hatanaka <ahatanaka@mips.com>2013-05-16 19:57:23 +0000
commitfce4dd79748b270c5588f46cdb21a5e29103ce58 (patch)
treeee81fd9ac7210c43d59d481497c37158f306d242 /llvm/lib/Target/Mips/MipsSEInstrInfo.h
parent2414a6997ba8f372a7531bcafa311e42271c46cd (diff)
downloadbcm5719-llvm-fce4dd79748b270c5588f46cdb21a5e29103ce58.tar.gz
bcm5719-llvm-fce4dd79748b270c5588f46cdb21a5e29103ce58.zip
[mips] Test case for r182042. Add comment.
llvm-svn: 182044
Diffstat (limited to 'llvm/lib/Target/Mips/MipsSEInstrInfo.h')
-rw-r--r--llvm/lib/Target/Mips/MipsSEInstrInfo.h12
1 files changed, 12 insertions, 0 deletions
diff --git a/llvm/lib/Target/Mips/MipsSEInstrInfo.h b/llvm/lib/Target/Mips/MipsSEInstrInfo.h
index f4c29b1676a..e44ff42b706 100644
--- a/llvm/lib/Target/Mips/MipsSEInstrInfo.h
+++ b/llvm/lib/Target/Mips/MipsSEInstrInfo.h
@@ -83,9 +83,21 @@ private:
void expandRetRA(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
unsigned Opc) const;
+
+ /// Expand pseudo Int-to-FP conversion instructions.
+ ///
+ /// For example, the following pseudo instruction
+ /// PseudoCVT_D32_W D2, A5
+ /// gets expanded into these two instructions:
+ /// MTC1 F4, A5
+ /// CVT_D32_W D2, F4
+ ///
+ /// We do this expansion post-RA to avoid inserting a floating point copy
+ /// instruction between MTC1 and CVT_D32_W.
void expandCvtFPInt(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
unsigned CvtOpc, unsigned MovOpc, bool DstIsLarger,
bool SrcIsLarger, bool IsI64) const;
+
void expandExtractElementF64(MachineBasicBlock &MBB,
MachineBasicBlock::iterator I) const;
void expandBuildPairF64(MachineBasicBlock &MBB,
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