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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2014-07-27 17:46:40 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2014-07-27 17:46:40 +0000 |
| commit | 6f2a526101bfef214aef8cae8dba4a9cce55b6fa (patch) | |
| tree | 7fdf854c43b57af4354e0d48aec858b4e72b18be /llvm/lib/Target/Mips/MipsSEISelLowering.h | |
| parent | b3cd5a1037d71e33b2519fcaf66e2978679f3c22 (diff) | |
| download | bcm5719-llvm-6f2a526101bfef214aef8cae8dba4a9cce55b6fa.tar.gz bcm5719-llvm-6f2a526101bfef214aef8cae8dba4a9cce55b6fa.zip | |
Add alignment value to allowsUnalignedMemoryAccess
Rename to allowsMisalignedMemoryAccess.
On R600, 8 and 16 byte accesses are mostly OK with 4-byte alignment,
and don't need to be split into multiple accesses. Vector loads with
an alignment of the element type are not uncommon in OpenCL code.
llvm-svn: 214055
Diffstat (limited to 'llvm/lib/Target/Mips/MipsSEISelLowering.h')
| -rw-r--r-- | llvm/lib/Target/Mips/MipsSEISelLowering.h | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/llvm/lib/Target/Mips/MipsSEISelLowering.h b/llvm/lib/Target/Mips/MipsSEISelLowering.h index 00d86834be0..a252291a1fa 100644 --- a/llvm/lib/Target/Mips/MipsSEISelLowering.h +++ b/llvm/lib/Target/Mips/MipsSEISelLowering.h @@ -31,8 +31,9 @@ namespace llvm { void addMSAFloatType(MVT::SimpleValueType Ty, const TargetRegisterClass *RC); - bool allowsUnalignedMemoryAccesses(EVT VT, unsigned AS = 0, - bool *Fast = nullptr) const override; + bool allowsMisalignedMemoryAccesses(EVT VT, unsigned AS = 0, + unsigned Align = 1, + bool *Fast = nullptr) const override; SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override; |

