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author | Daniel Sanders <daniel.sanders@imgtec.com> | 2014-03-31 18:51:43 +0000 |
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committer | Daniel Sanders <daniel.sanders@imgtec.com> | 2014-03-31 18:51:43 +0000 |
commit | e34a1202856772b87cf5a350745b42e5320f01ef (patch) | |
tree | ba09fbcbdeeecabc6ee940390fd8f74ae0446e69 /llvm/lib/Target/Mips/MipsSEISelLowering.cpp | |
parent | 4c537177879dfb14c91bc87fb0c59bdfa2ce6423 (diff) | |
download | bcm5719-llvm-e34a1202856772b87cf5a350745b42e5320f01ef.tar.gz bcm5719-llvm-e34a1202856772b87cf5a350745b42e5320f01ef.zip |
Revert: [mips] Rewrite MipsAsmParser and MipsOperand.' due to buildbot errors in lld tests.
It's currently unable to parse 'sym + imm' without surrounding parenthesis.
llvm-svn: 205237
Diffstat (limited to 'llvm/lib/Target/Mips/MipsSEISelLowering.cpp')
-rw-r--r-- | llvm/lib/Target/Mips/MipsSEISelLowering.cpp | 13 |
1 files changed, 2 insertions, 11 deletions
diff --git a/llvm/lib/Target/Mips/MipsSEISelLowering.cpp b/llvm/lib/Target/Mips/MipsSEISelLowering.cpp index 0dac0b79909..218cd15baa9 100644 --- a/llvm/lib/Target/Mips/MipsSEISelLowering.cpp +++ b/llvm/lib/Target/Mips/MipsSEISelLowering.cpp @@ -1810,13 +1810,6 @@ SDValue MipsSETargetLowering::lowerINTRINSIC_WO_CHAIN(SDValue Op, case Intrinsic::mips_insert_d: return DAG.getNode(ISD::INSERT_VECTOR_ELT, SDLoc(Op), Op->getValueType(0), Op->getOperand(1), Op->getOperand(3), Op->getOperand(2)); - case Intrinsic::mips_insve_b: - case Intrinsic::mips_insve_h: - case Intrinsic::mips_insve_w: - case Intrinsic::mips_insve_d: - return DAG.getNode(MipsISD::INSVE, DL, Op->getValueType(0), - Op->getOperand(1), Op->getOperand(2), Op->getOperand(3), - DAG.getConstant(0, MVT::i32)); case Intrinsic::mips_ldi_b: case Intrinsic::mips_ldi_h: case Intrinsic::mips_ldi_w: @@ -2844,8 +2837,7 @@ MipsSETargetLowering::emitINSERT_FW(MachineInstr *MI, BuildMI(*BB, MI, DL, TII->get(Mips::INSVE_W), Wd) .addReg(Wd_in) .addImm(Lane) - .addReg(Wt) - .addImm(0); + .addReg(Wt); MI->eraseFromParent(); // The pseudo instruction is gone now. return BB; @@ -2878,8 +2870,7 @@ MipsSETargetLowering::emitINSERT_FD(MachineInstr *MI, BuildMI(*BB, MI, DL, TII->get(Mips::INSVE_D), Wd) .addReg(Wd_in) .addImm(Lane) - .addReg(Wt) - .addImm(0); + .addReg(Wt); MI->eraseFromParent(); // The pseudo instruction is gone now. return BB; |