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author | Matthias Braun <matze@braunis.de> | 2016-11-30 23:48:42 +0000 |
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committer | Matthias Braun <matze@braunis.de> | 2016-11-30 23:48:42 +0000 |
commit | f23ef437ccf39dd8209960b942b3751547b07af5 (patch) | |
tree | 4da3a28f0d68d50b7fe792f6fdb316b31e0d3ad4 /llvm/lib/Target/Mips/MipsSEFrameLowering.cpp | |
parent | 39c3c89cdc20b541dee4b2ebb52c867d07982294 (diff) | |
download | bcm5719-llvm-f23ef437ccf39dd8209960b942b3751547b07af5.tar.gz bcm5719-llvm-f23ef437ccf39dd8209960b942b3751547b07af5.zip |
Move FrameInstructions from MachineModuleInfo to MachineFunction
This is per function data so it is better kept at the function instead
of the module.
This is a necessary step to have machine module passes work properly.
Differential Revision: https://reviews.llvm.org/D27185
llvm-svn: 288291
Diffstat (limited to 'llvm/lib/Target/Mips/MipsSEFrameLowering.cpp')
-rw-r--r-- | llvm/lib/Target/Mips/MipsSEFrameLowering.cpp | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/llvm/lib/Target/Mips/MipsSEFrameLowering.cpp b/llvm/lib/Target/Mips/MipsSEFrameLowering.cpp index a2cfbc577dc..4996d070eb2 100644 --- a/llvm/lib/Target/Mips/MipsSEFrameLowering.cpp +++ b/llvm/lib/Target/Mips/MipsSEFrameLowering.cpp @@ -409,7 +409,7 @@ void MipsSEFrameLowering::emitPrologue(MachineFunction &MF, TII.adjustStackPtr(SP, -StackSize, MBB, MBBI); // emit ".cfi_def_cfa_offset StackSize" - unsigned CFIIndex = MMI.addFrameInst( + unsigned CFIIndex = MF.addFrameInst( MCCFIInstruction::createDefCfaOffset(nullptr, -StackSize)); BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION)) .addCFIIndex(CFIIndex); @@ -443,12 +443,12 @@ void MipsSEFrameLowering::emitPrologue(MachineFunction &MF, if (!STI.isLittle()) std::swap(Reg0, Reg1); - unsigned CFIIndex = MMI.addFrameInst( + unsigned CFIIndex = MF.addFrameInst( MCCFIInstruction::createOffset(nullptr, Reg0, Offset)); BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION)) .addCFIIndex(CFIIndex); - CFIIndex = MMI.addFrameInst( + CFIIndex = MF.addFrameInst( MCCFIInstruction::createOffset(nullptr, Reg1, Offset + 4)); BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION)) .addCFIIndex(CFIIndex); @@ -459,18 +459,18 @@ void MipsSEFrameLowering::emitPrologue(MachineFunction &MF, if (!STI.isLittle()) std::swap(Reg0, Reg1); - unsigned CFIIndex = MMI.addFrameInst( + unsigned CFIIndex = MF.addFrameInst( MCCFIInstruction::createOffset(nullptr, Reg0, Offset)); BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION)) .addCFIIndex(CFIIndex); - CFIIndex = MMI.addFrameInst( + CFIIndex = MF.addFrameInst( MCCFIInstruction::createOffset(nullptr, Reg1, Offset + 4)); BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION)) .addCFIIndex(CFIIndex); } else { // Reg is either in GPR32 or FGR32. - unsigned CFIIndex = MMI.addFrameInst(MCCFIInstruction::createOffset( + unsigned CFIIndex = MF.addFrameInst(MCCFIInstruction::createOffset( nullptr, MRI->getDwarfRegNum(Reg, 1), Offset)); BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION)) .addCFIIndex(CFIIndex); @@ -491,7 +491,7 @@ void MipsSEFrameLowering::emitPrologue(MachineFunction &MF, for (int I = 0; I < 4; ++I) { int64_t Offset = MFI.getObjectOffset(MipsFI->getEhDataRegFI(I)); unsigned Reg = MRI->getDwarfRegNum(ABI.GetEhDataReg(I), true); - unsigned CFIIndex = MMI.addFrameInst( + unsigned CFIIndex = MF.addFrameInst( MCCFIInstruction::createOffset(nullptr, Reg, Offset)); BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION)) .addCFIIndex(CFIIndex); @@ -505,7 +505,7 @@ void MipsSEFrameLowering::emitPrologue(MachineFunction &MF, .setMIFlag(MachineInstr::FrameSetup); // emit ".cfi_def_cfa_register $fp" - unsigned CFIIndex = MMI.addFrameInst(MCCFIInstruction::createDefCfaRegister( + unsigned CFIIndex = MF.addFrameInst(MCCFIInstruction::createDefCfaRegister( nullptr, MRI->getDwarfRegNum(FP, true))); BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION)) .addCFIIndex(CFIIndex); |