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authorVasileios Kalintiris <Vasileios.Kalintiris@imgtec.com>2015-08-11 08:56:25 +0000
committerVasileios Kalintiris <Vasileios.Kalintiris@imgtec.com>2015-08-11 08:56:25 +0000
commit1c78ca6a09cec862d6aad04e820dae98b71be9fc (patch)
treeef6def2a0475fbea2672cf161260dc2830857755 /llvm/lib/Target/Mips/MipsSEFrameLowering.cpp
parent7337ee23d8ee9864d6b5f4140aaa56cf68388361 (diff)
downloadbcm5719-llvm-1c78ca6a09cec862d6aad04e820dae98b71be9fc.tar.gz
bcm5719-llvm-1c78ca6a09cec862d6aad04e820dae98b71be9fc.zip
[mips] Remap move as or.
Summary: This patch remaps the assembly idiom 'move' to 'or' instead of 'daddu' or 'addu'. The use of addu/daddu instead of or as move was highlighted as a performance issue during the analysis of a recent 64bit design. Originally move was encoded as 'or' by binutils but was changed for the r10k cpu family due to their pipeline which had 2 arithmetic units and a single logical unit, and so could issue multiple (d)addu based moves at the same time but only 1 logical move. This patch preserves the disassembly behaviour so that disassembling a old style (d)addu move still appears as move, but assembling move always gives an or Patch by Simon Dardis. Reviewers: vkalintiris Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D11796 llvm-svn: 244579
Diffstat (limited to 'llvm/lib/Target/Mips/MipsSEFrameLowering.cpp')
-rw-r--r--llvm/lib/Target/Mips/MipsSEFrameLowering.cpp10
1 files changed, 5 insertions, 5 deletions
diff --git a/llvm/lib/Target/Mips/MipsSEFrameLowering.cpp b/llvm/lib/Target/Mips/MipsSEFrameLowering.cpp
index a19d1504e1e..5b4608fad2b 100644
--- a/llvm/lib/Target/Mips/MipsSEFrameLowering.cpp
+++ b/llvm/lib/Target/Mips/MipsSEFrameLowering.cpp
@@ -381,7 +381,7 @@ void MipsSEFrameLowering::emitPrologue(MachineFunction &MF,
unsigned SP = ABI.GetStackPtr();
unsigned FP = ABI.GetFramePtr();
unsigned ZERO = ABI.GetNullPtr();
- unsigned ADDu = ABI.GetPtrAdduOp();
+ unsigned MOVE = ABI.GetGPRMoveOp();
unsigned ADDiu = ABI.GetPtrAddiuOp();
unsigned AND = ABI.IsN64() ? Mips::AND64 : Mips::AND;
@@ -491,7 +491,7 @@ void MipsSEFrameLowering::emitPrologue(MachineFunction &MF,
// if framepointer enabled, set it to point to the stack pointer.
if (hasFP(MF)) {
// Insert instruction "move $fp, $sp" at this location.
- BuildMI(MBB, MBBI, dl, TII.get(ADDu), FP).addReg(SP).addReg(ZERO)
+ BuildMI(MBB, MBBI, dl, TII.get(MOVE), FP).addReg(SP).addReg(ZERO)
.setMIFlag(MachineInstr::FrameSetup);
// emit ".cfi_def_cfa_register $fp"
@@ -514,7 +514,7 @@ void MipsSEFrameLowering::emitPrologue(MachineFunction &MF,
if (hasBP(MF)) {
// move $s7, $sp
unsigned BP = STI.isABI_N64() ? Mips::S7_64 : Mips::S7;
- BuildMI(MBB, MBBI, dl, TII.get(ADDu), BP)
+ BuildMI(MBB, MBBI, dl, TII.get(MOVE), BP)
.addReg(SP)
.addReg(ZERO);
}
@@ -538,7 +538,7 @@ void MipsSEFrameLowering::emitEpilogue(MachineFunction &MF,
unsigned SP = ABI.GetStackPtr();
unsigned FP = ABI.GetFramePtr();
unsigned ZERO = ABI.GetNullPtr();
- unsigned ADDu = ABI.GetPtrAdduOp();
+ unsigned MOVE = ABI.GetGPRMoveOp();
// if framepointer enabled, restore the stack pointer.
if (hasFP(MF)) {
@@ -549,7 +549,7 @@ void MipsSEFrameLowering::emitEpilogue(MachineFunction &MF,
--I;
// Insert instruction "move $sp, $fp" at this location.
- BuildMI(MBB, I, dl, TII.get(ADDu), SP).addReg(FP).addReg(ZERO);
+ BuildMI(MBB, I, dl, TII.get(MOVE), SP).addReg(FP).addReg(ZERO);
}
if (MipsFI->callsEhReturn()) {
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