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| author | Akira Hatanaka <ahatanaka@mips.com> | 2013-08-08 21:54:26 +0000 |
|---|---|---|
| committer | Akira Hatanaka <ahatanaka@mips.com> | 2013-08-08 21:54:26 +0000 |
| commit | 00fcf2e1694f5af8afb0d80199d23488e0a1c016 (patch) | |
| tree | 14b8ae2a85c71fe8586a18d5baf871244823dc9f /llvm/lib/Target/Mips/MipsSEFrameLowering.cpp | |
| parent | 2472b928d221fb4d48c8e0f771f0467c51af73c7 (diff) | |
| download | bcm5719-llvm-00fcf2e1694f5af8afb0d80199d23488e0a1c016.tar.gz bcm5719-llvm-00fcf2e1694f5af8afb0d80199d23488e0a1c016.zip | |
[mips] Rename accumulator register classes and FP register operands.
llvm-svn: 188020
Diffstat (limited to 'llvm/lib/Target/Mips/MipsSEFrameLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/Mips/MipsSEFrameLowering.cpp | 28 |
1 files changed, 14 insertions, 14 deletions
diff --git a/llvm/lib/Target/Mips/MipsSEFrameLowering.cpp b/llvm/lib/Target/Mips/MipsSEFrameLowering.cpp index d9e0fa4aac4..2b0672cc2a3 100644 --- a/llvm/lib/Target/Mips/MipsSEFrameLowering.cpp +++ b/llvm/lib/Target/Mips/MipsSEFrameLowering.cpp @@ -77,24 +77,24 @@ bool ExpandPseudo::expandInstr(MachineBasicBlock &MBB, Iter I) { case Mips::STORE_CCOND_DSP_P8: expandStoreCCond(MBB, I); break; - case Mips::LOAD_AC64: - case Mips::LOAD_AC64_P8: - case Mips::LOAD_AC_DSP: - case Mips::LOAD_AC_DSP_P8: + case Mips::LOAD_ACC64: + case Mips::LOAD_ACC64_P8: + case Mips::LOAD_ACC64DSP: + case Mips::LOAD_ACC64DSP_P8: expandLoadACC(MBB, I, 4); break; - case Mips::LOAD_AC128: - case Mips::LOAD_AC128_P8: + case Mips::LOAD_ACC128: + case Mips::LOAD_ACC128_P8: expandLoadACC(MBB, I, 8); break; - case Mips::STORE_AC64: - case Mips::STORE_AC64_P8: - case Mips::STORE_AC_DSP: - case Mips::STORE_AC_DSP_P8: + case Mips::STORE_ACC64: + case Mips::STORE_ACC64_P8: + case Mips::STORE_ACC64DSP: + case Mips::STORE_ACC64DSP_P8: expandStoreACC(MBB, I, 4); break; - case Mips::STORE_AC128: - case Mips::STORE_AC128_P8: + case Mips::STORE_ACC128: + case Mips::STORE_ACC128_P8: expandStoreACC(MBB, I, 8); break; case TargetOpcode::COPY: @@ -210,10 +210,10 @@ void ExpandPseudo::expandStoreACC(MachineBasicBlock &MBB, Iter I, bool ExpandPseudo::expandCopy(MachineBasicBlock &MBB, Iter I) { unsigned Dst = I->getOperand(0).getReg(), Src = I->getOperand(1).getReg(); - if (Mips::ACRegsDSPRegClass.contains(Dst, Src)) + if (Mips::ACC64DSPRegClass.contains(Dst, Src)) return expandCopyACC(MBB, I, Dst, Src, 4); - if (Mips::ACRegs128RegClass.contains(Dst, Src)) + if (Mips::ACC128RegClass.contains(Dst, Src)) return expandCopyACC(MBB, I, Dst, Src, 8); return false; |

