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authorAkira Hatanaka <ahatanaka@mips.com>2013-08-14 00:53:38 +0000
committerAkira Hatanaka <ahatanaka@mips.com>2013-08-14 00:53:38 +0000
commit654655f1c58fec491f0c221b6ea17ec38ea7e71e (patch)
tree5d164396b039591ec78b89f6dafb3d41056380a4 /llvm/lib/Target/Mips/MipsRegisterInfo.cpp
parent8002a3f6d877725dc03cf78dde3ac7ccbcf14ae6 (diff)
downloadbcm5719-llvm-654655f1c58fec491f0c221b6ea17ec38ea7e71e.tar.gz
bcm5719-llvm-654655f1c58fec491f0c221b6ea17ec38ea7e71e.zip
[mips] Rename DSPRegs.
llvm-svn: 188342
Diffstat (limited to 'llvm/lib/Target/Mips/MipsRegisterInfo.cpp')
-rw-r--r--llvm/lib/Target/Mips/MipsRegisterInfo.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/Mips/MipsRegisterInfo.cpp b/llvm/lib/Target/Mips/MipsRegisterInfo.cpp
index eb1e056dca1..6d76021cb41 100644
--- a/llvm/lib/Target/Mips/MipsRegisterInfo.cpp
+++ b/llvm/lib/Target/Mips/MipsRegisterInfo.cpp
@@ -56,7 +56,7 @@ MipsRegisterInfo::getRegPressureLimit(const TargetRegisterClass *RC,
return 0;
case Mips::GPR32RegClassID:
case Mips::GPR64RegClassID:
- case Mips::DSPRegsRegClassID: {
+ case Mips::DSPRRegClassID: {
const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering();
return 28 - TFI->hasFP(MF);
}
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