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| author | Sasa Stankovic <Sasa.Stankovic@imgtec.com> | 2014-05-27 18:53:06 +0000 |
|---|---|---|
| committer | Sasa Stankovic <Sasa.Stankovic@imgtec.com> | 2014-05-27 18:53:06 +0000 |
| commit | e41db2fe31d3c7d4656ff2e84830ce2f0a7645b9 (patch) | |
| tree | a3f52a58639a17223b77bc4f5d9e9724aae1875b /llvm/lib/Target/Mips/MipsMCInstLower.cpp | |
| parent | 482097d0981642624a727ba83b4926082f44982f (diff) | |
| download | bcm5719-llvm-e41db2fe31d3c7d4656ff2e84830ce2f0a7645b9.tar.gz bcm5719-llvm-e41db2fe31d3c7d4656ff2e84830ce2f0a7645b9.zip | |
[mips] Optimize long branch for MIPS64 by removing %higher and %highest.
%higher and %highest can have non-zero values only for offsets greater
than 2GB, which is highly unlikely, if not impossible when compiling a
single function. This makes long branch for MIPS64 3 instructions smaller.
Differential Revision: http://llvm-reviews.chandlerc.com/D3281.diff
llvm-svn: 209678
Diffstat (limited to 'llvm/lib/Target/Mips/MipsMCInstLower.cpp')
| -rw-r--r-- | llvm/lib/Target/Mips/MipsMCInstLower.cpp | 23 |
1 files changed, 8 insertions, 15 deletions
diff --git a/llvm/lib/Target/Mips/MipsMCInstLower.cpp b/llvm/lib/Target/Mips/MipsMCInstLower.cpp index 85f78674661..821392e1d45 100644 --- a/llvm/lib/Target/Mips/MipsMCInstLower.cpp +++ b/llvm/lib/Target/Mips/MipsMCInstLower.cpp @@ -162,16 +162,16 @@ MCOperand MipsMCInstLower::createSub(MachineBasicBlock *BB1, } void MipsMCInstLower:: -lowerLongBranchLUi(const MachineInstr *MI, MCInst &OutMI, int Opcode, - MCSymbolRefExpr::VariantKind Kind) const { - OutMI.setOpcode(Opcode); +lowerLongBranchLUi(const MachineInstr *MI, MCInst &OutMI) const { + OutMI.setOpcode(Mips::LUi); // Lower register operand. OutMI.addOperand(LowerOperand(MI->getOperand(0))); - // Create %hi($tgt-$baltgt) or %highest($tgt-$baltgt). + // Create %hi($tgt-$baltgt). OutMI.addOperand(createSub(MI->getOperand(1).getMBB(), - MI->getOperand(2).getMBB(), Kind)); + MI->getOperand(2).getMBB(), + MCSymbolRefExpr::VK_Mips_ABS_HI)); } void MipsMCInstLower:: @@ -185,7 +185,7 @@ lowerLongBranchADDiu(const MachineInstr *MI, MCInst &OutMI, int Opcode, OutMI.addOperand(LowerOperand(MO)); } - // Create %lo($tgt-$baltgt), %hi($tgt-$baltgt) or %higher($tgt-$baltgt). + // Create %lo($tgt-$baltgt) or %hi($tgt-$baltgt). OutMI.addOperand(createSub(MI->getOperand(2).getMBB(), MI->getOperand(3).getMBB(), Kind)); } @@ -196,11 +196,7 @@ bool MipsMCInstLower::lowerLongBranch(const MachineInstr *MI, default: return false; case Mips::LONG_BRANCH_LUi: - lowerLongBranchLUi(MI, OutMI, Mips::LUi, MCSymbolRefExpr::VK_Mips_ABS_HI); - return true; - case Mips::LONG_BRANCH_LUi64: - lowerLongBranchLUi(MI, OutMI, Mips::LUi64, - MCSymbolRefExpr::VK_Mips_HIGHEST); + lowerLongBranchLUi(MI, OutMI); return true; case Mips::LONG_BRANCH_ADDiu: lowerLongBranchADDiu(MI, OutMI, Mips::ADDiu, @@ -208,10 +204,7 @@ bool MipsMCInstLower::lowerLongBranch(const MachineInstr *MI, return true; case Mips::LONG_BRANCH_DADDiu: unsigned TargetFlags = MI->getOperand(2).getTargetFlags(); - if (TargetFlags == MipsII::MO_HIGHER) - lowerLongBranchADDiu(MI, OutMI, Mips::DADDiu, - MCSymbolRefExpr::VK_Mips_HIGHER); - else if (TargetFlags == MipsII::MO_ABS_HI) + if (TargetFlags == MipsII::MO_ABS_HI) lowerLongBranchADDiu(MI, OutMI, Mips::DADDiu, MCSymbolRefExpr::VK_Mips_ABS_HI); else if (TargetFlags == MipsII::MO_ABS_LO) |
