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| author | Petar Avramovic <Petar.Avramovic@rt-rk.com> | 2018-12-17 12:31:07 +0000 |
|---|---|---|
| committer | Petar Avramovic <Petar.Avramovic@rt-rk.com> | 2018-12-17 12:31:07 +0000 |
| commit | b8276f22807a37d9e5a1721c965d2e3e1343f025 (patch) | |
| tree | af9d34215fc488d4af39d1ed2b8e91cd68ea96ba /llvm/lib/Target/Mips/MipsLegalizerInfo.cpp | |
| parent | 375c54fd1e8833570013d6f44e7bd09dc87d7211 (diff) | |
| download | bcm5719-llvm-b8276f22807a37d9e5a1721c965d2e3e1343f025.tar.gz bcm5719-llvm-b8276f22807a37d9e5a1721c965d2e3e1343f025.zip | |
[MIPS GlobalISel] Lower G_UADDE and narrowScalar G_ADD
Lower G_UADDE and legalize G_ADD using narrowScalar on MIPS32.
Differential Revision: https://reviews.llvm.org/D54580
llvm-svn: 349346
Diffstat (limited to 'llvm/lib/Target/Mips/MipsLegalizerInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/Mips/MipsLegalizerInfo.cpp | 35 |
1 files changed, 5 insertions, 30 deletions
diff --git a/llvm/lib/Target/Mips/MipsLegalizerInfo.cpp b/llvm/lib/Target/Mips/MipsLegalizerInfo.cpp index 02e787f77ab..08e5ddd0342 100644 --- a/llvm/lib/Target/Mips/MipsLegalizerInfo.cpp +++ b/llvm/lib/Target/Mips/MipsLegalizerInfo.cpp @@ -20,14 +20,16 @@ using namespace llvm; MipsLegalizerInfo::MipsLegalizerInfo(const MipsSubtarget &ST) { using namespace TargetOpcode; + const LLT s1 = LLT::scalar(1); const LLT s32 = LLT::scalar(32); - const LLT s64 = LLT::scalar(64); const LLT p0 = LLT::pointer(0, 32); getActionDefinitionsBuilder(G_ADD) .legalFor({s32}) - .minScalar(0, s32) - .customFor({s64}); + .clampScalar(0, s32, s32); + + getActionDefinitionsBuilder(G_UADDE) + .lowerFor({{s32, s1}}); getActionDefinitionsBuilder({G_LOAD, G_STORE}) .legalForCartesianProduct({p0, s32}, {p0}); @@ -66,33 +68,6 @@ bool MipsLegalizerInfo::legalizeCustom(MachineInstr &MI, MIRBuilder.setInstr(MI); switch (MI.getOpcode()) { - case G_ADD: { - unsigned Size = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(); - - const LLT sHalf = LLT::scalar(Size / 2); - - unsigned RHSLow = MRI.createGenericVirtualRegister(sHalf); - unsigned RHSHigh = MRI.createGenericVirtualRegister(sHalf); - unsigned LHSLow = MRI.createGenericVirtualRegister(sHalf); - unsigned LHSHigh = MRI.createGenericVirtualRegister(sHalf); - unsigned ResLow = MRI.createGenericVirtualRegister(sHalf); - unsigned ResHigh = MRI.createGenericVirtualRegister(sHalf); - unsigned Carry = MRI.createGenericVirtualRegister(sHalf); - unsigned TmpResHigh = MRI.createGenericVirtualRegister(sHalf); - - MIRBuilder.buildUnmerge({RHSLow, RHSHigh}, MI.getOperand(2).getReg()); - MIRBuilder.buildUnmerge({LHSLow, LHSHigh}, MI.getOperand(1).getReg()); - - MIRBuilder.buildAdd(TmpResHigh, LHSHigh, RHSHigh); - MIRBuilder.buildAdd(ResLow, LHSLow, RHSLow); - MIRBuilder.buildICmp(CmpInst::ICMP_ULT, Carry, ResLow, LHSLow); - MIRBuilder.buildAdd(ResHigh, TmpResHigh, Carry); - - MIRBuilder.buildMerge(MI.getOperand(0).getReg(), {ResLow, ResHigh}); - - MI.eraseFromParent(); - break; - } default: return false; } |

