diff options
author | Petar Avramovic <Petar.Avramovic@rt-rk.com> | 2019-02-14 12:36:19 +0000 |
---|---|---|
committer | Petar Avramovic <Petar.Avramovic@rt-rk.com> | 2019-02-14 12:36:19 +0000 |
commit | 14c7ecfe84a777673b9af89c8a555f81924afe3c (patch) | |
tree | 146137e3e3841953f44cfcbc4551dfa49220b302 /llvm/lib/Target/Mips/MipsInstructionSelector.cpp | |
parent | c6e768f0ee3980fee0eadb4c0a5710c3b3c1fcad (diff) | |
download | bcm5719-llvm-14c7ecfe84a777673b9af89c8a555f81924afe3c.tar.gz bcm5719-llvm-14c7ecfe84a777673b9af89c8a555f81924afe3c.zip |
[MIPS GlobalISel] Select phi instruction for integers
Select G_PHI for integers for MIPS32.
Differential Revision: https://reviews.llvm.org/D58183
llvm-svn: 354025
Diffstat (limited to 'llvm/lib/Target/Mips/MipsInstructionSelector.cpp')
-rw-r--r-- | llvm/lib/Target/Mips/MipsInstructionSelector.cpp | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/llvm/lib/Target/Mips/MipsInstructionSelector.cpp b/llvm/lib/Target/Mips/MipsInstructionSelector.cpp index 41856476716..c97fac9d21b 100644 --- a/llvm/lib/Target/Mips/MipsInstructionSelector.cpp +++ b/llvm/lib/Target/Mips/MipsInstructionSelector.cpp @@ -160,6 +160,18 @@ bool MipsInstructionSelector::select(MachineInstr &I, .add(I.getOperand(1)); break; } + case G_PHI: { + const unsigned DestReg = I.getOperand(0).getReg(); + const unsigned DestRegBank = RBI.getRegBank(DestReg, MRI, TRI)->getID(); + const unsigned OpSize = MRI.getType(DestReg).getSizeInBits(); + + if (DestRegBank != Mips::GPRBRegBankID || OpSize != 32) + return false; + + const TargetRegisterClass *DefRC = &Mips::GPR32RegClass; + I.setDesc(TII.get(TargetOpcode::PHI)); + return RBI.constrainGenericRegister(DestReg, *DefRC, MRI); + } case G_STORE: case G_LOAD: case G_ZEXTLOAD: |