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| author | Hrvoje Varga <Hrvoje.Varga@imgtec.com> | 2016-09-08 07:41:43 +0000 |
|---|---|---|
| committer | Hrvoje Varga <Hrvoje.Varga@imgtec.com> | 2016-09-08 07:41:43 +0000 |
| commit | dbe4d96b4f7e6ee8b4d05f4a6df6891fb28b3d9b (patch) | |
| tree | a9a01da3fb1ecf14185f600f2b6b243e20420fe3 /llvm/lib/Target/Mips/MipsInstrInfo.td | |
| parent | b638c48819d772ec36bbc8036da2cbb4044126ec (diff) | |
| download | bcm5719-llvm-dbe4d96b4f7e6ee8b4d05f4a6df6891fb28b3d9b.tar.gz bcm5719-llvm-dbe4d96b4f7e6ee8b4d05f4a6df6891fb28b3d9b.zip | |
[mips][microMIPS] Implement DBITSWAP, DLSA and LWUPC and add tests for AUI instructions
Differential Revision: https://reviews.llvm.org/D16452
llvm-svn: 280909
Diffstat (limited to 'llvm/lib/Target/Mips/MipsInstrInfo.td')
| -rw-r--r-- | llvm/lib/Target/Mips/MipsInstrInfo.td | 21 |
1 files changed, 20 insertions, 1 deletions
diff --git a/llvm/lib/Target/Mips/MipsInstrInfo.td b/llvm/lib/Target/Mips/MipsInstrInfo.td index 4dd8a5c719a..39b31074608 100644 --- a/llvm/lib/Target/Mips/MipsInstrInfo.td +++ b/llvm/lib/Target/Mips/MipsInstrInfo.td @@ -413,6 +413,15 @@ class ConstantSImmAsmOperandClass<int Bits, list<AsmOperandClass> Supers = [], let DiagnosticType = "SImm" # Bits # "_" # Offset; } +class SimmLslAsmOperandClass<int Bits, list<AsmOperandClass> Supers = [], + int Shift = 0> : AsmOperandClass { + let Name = "Simm" # Bits # "_Lsl" # Shift; + let RenderMethod = "addImmOperands"; + let PredicateMethod = "isScaledSImm<" # Bits # ", " # Shift # ">"; + let SuperClasses = Supers; + let DiagnosticType = "SImm" # Bits # "_Lsl" # Shift; +} + class ConstantUImmAsmOperandClass<int Bits, list<AsmOperandClass> Supers = [], int Offset = 0> : AsmOperandClass { let Name = "ConstantUImm" # Bits # "_" # Offset; @@ -485,6 +494,13 @@ def ConstantUImm26AsmOperandClass : ConstantUImmAsmOperandClass<26, [SImm32AsmOperandClass]>; def ConstantUImm20AsmOperandClass : ConstantUImmAsmOperandClass<20, [ConstantUImm26AsmOperandClass]>; +def ConstantSImm19Lsl2AsmOperandClass : AsmOperandClass { + let Name = "SImm19Lsl2"; + let RenderMethod = "addImmOperands"; + let PredicateMethod = "isScaledSImm<19, 2>"; + let SuperClasses = [ConstantUImm20AsmOperandClass]; + let DiagnosticType = "SImm19_Lsl2"; +} def UImm16RelaxedAsmOperandClass : UImmAsmOperandClass<16, [ConstantUImm20AsmOperandClass]> { let Name = "UImm16_Relaxed"; @@ -611,6 +627,9 @@ def ConstantImmzAsmOperandClass : AsmOperandClass { let DiagnosticType = "Immz"; } +def Simm19Lsl2AsmOperand + : SimmLslAsmOperandClass<19, [], 2>; + def MipsJumpTargetAsmOperand : AsmOperandClass { let Name = "JumpTarget"; let ParserMethod = "parseJumpTarget"; @@ -645,7 +664,7 @@ def imm64: Operand<i64>; def simm19_lsl2 : Operand<i32> { let EncoderMethod = "getSimm19Lsl2Encoding"; let DecoderMethod = "DecodeSimm19Lsl2"; - let ParserMatchClass = MipsJumpTargetAsmOperand; + let ParserMatchClass = Simm19Lsl2AsmOperand; } def simm18_lsl3 : Operand<i32> { |

