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| author | Zlatko Buljan <Zlatko.Buljan@imgtec.com> | 2015-12-18 08:59:37 +0000 |
|---|---|---|
| committer | Zlatko Buljan <Zlatko.Buljan@imgtec.com> | 2015-12-18 08:59:37 +0000 |
| commit | 252cca555f3c9b0958573092873f239430dd47fe (patch) | |
| tree | ee3beedffcfee74924b60af37519438a4f278b3b /llvm/lib/Target/Mips/MipsInstrInfo.td | |
| parent | 8ef3141127e6d31503ed9a031192bfb76c884d20 (diff) | |
| download | bcm5719-llvm-252cca555f3c9b0958573092873f239430dd47fe.tar.gz bcm5719-llvm-252cca555f3c9b0958573092873f239430dd47fe.zip | |
[mips][microMIPS][DSP] Implement PACKRL.PH, PICK.PH, PICK.QB, SHILO, SHILOV and WRDSP instructions
Differential Revision: http://reviews.llvm.org/D14429
llvm-svn: 255991
Diffstat (limited to 'llvm/lib/Target/Mips/MipsInstrInfo.td')
| -rw-r--r-- | llvm/lib/Target/Mips/MipsInstrInfo.td | 21 |
1 files changed, 19 insertions, 2 deletions
diff --git a/llvm/lib/Target/Mips/MipsInstrInfo.td b/llvm/lib/Target/Mips/MipsInstrInfo.td index c07edef8673..6d83cceab40 100644 --- a/llvm/lib/Target/Mips/MipsInstrInfo.td +++ b/llvm/lib/Target/Mips/MipsInstrInfo.td @@ -385,6 +385,15 @@ include "MipsInstrFormats.td" // Mips Operand, Complex Patterns and Transformations Definitions. //===----------------------------------------------------------------------===// +class ConstantSImmAsmOperandClass<int Bits, list<AsmOperandClass> Supers = []> + : AsmOperandClass { + let Name = "ConstantSImm" # Bits; + let RenderMethod = "addImmOperands"; + let PredicateMethod = "isConstantSImm<" # Bits # ">"; + let SuperClasses = Supers; + let DiagnosticType = "SImm" # Bits; +} + class ConstantUImmAsmOperandClass<int Bits, list<AsmOperandClass> Supers = [], int Offset = 0> : AsmOperandClass { let Name = "ConstantUImm" # Bits # "_" # Offset; @@ -398,8 +407,12 @@ def ConstantUImm10AsmOperandClass : ConstantUImmAsmOperandClass<10, []>; def ConstantUImm8AsmOperandClass : ConstantUImmAsmOperandClass<8, [ConstantUImm10AsmOperandClass]>; +def ConstantUImm7AsmOperandClass + : ConstantUImmAsmOperandClass<7, [ConstantUImm8AsmOperandClass]>; def ConstantUImm6AsmOperandClass - : ConstantUImmAsmOperandClass<6, [ConstantUImm8AsmOperandClass]>; + : ConstantUImmAsmOperandClass<6, [ConstantUImm7AsmOperandClass]>; +def ConstantSImm6AsmOperandClass + : ConstantSImmAsmOperandClass<6, [ConstantUImm7AsmOperandClass]>; def ConstantUImm5Plus32AsmOperandClass : ConstantUImmAsmOperandClass<5, [ConstantUImm6AsmOperandClass], 32>; def ConstantUImm5Plus32NormalizeAsmOperandClass @@ -468,6 +481,10 @@ def calltarget : Operand<iPTR> { def imm64: Operand<i64>; +def simm6 : Operand<i32> { + let ParserMatchClass = ConstantSImm6AsmOperandClass; + let OperandType = "OPERAND_IMMEDIATE"; +} def simm9 : Operand<i32>; def simm10 : Operand<i32>; def simm11 : Operand<i32>; @@ -505,7 +522,7 @@ def uimmz : Operand<i32> { } // Unsigned Operands -foreach I = {1, 2, 3, 4, 5, 6, 8, 10} in +foreach I = {1, 2, 3, 4, 5, 6, 7, 8, 10} in def uimm # I : Operand<i32> { let PrintMethod = "printUnsignedImm"; let ParserMatchClass = |
