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authorChris Lattner <sabre@nondot.org>2007-12-30 23:10:15 +0000
committerChris Lattner <sabre@nondot.org>2007-12-30 23:10:15 +0000
commita5bb370aa42a238e07ee22adcdc792df292b1ab0 (patch)
tree9f8730cc8a4c235fb5a9a317760ca7475434d289 /llvm/lib/Target/Mips/MipsInstrInfo.cpp
parent1862b6daa08524be6289240cf7049484b0365e39 (diff)
downloadbcm5719-llvm-a5bb370aa42a238e07ee22adcdc792df292b1ab0.tar.gz
bcm5719-llvm-a5bb370aa42a238e07ee22adcdc792df292b1ab0.zip
Add new shorter predicates for testing machine operands for various types:
e.g. MO.isMBB() instead of MO.isMachineBasicBlock(). I don't plan on switching everything over, so new clients should just start using the shorter names. Remove old long accessors, switching everything over to use the short accessor: getMachineBasicBlock() -> getMBB(), getConstantPoolIndex() -> getIndex(), setMachineBasicBlock -> setMBB(), etc. llvm-svn: 45464
Diffstat (limited to 'llvm/lib/Target/Mips/MipsInstrInfo.cpp')
-rw-r--r--llvm/lib/Target/Mips/MipsInstrInfo.cpp14
1 files changed, 7 insertions, 7 deletions
diff --git a/llvm/lib/Target/Mips/MipsInstrInfo.cpp b/llvm/lib/Target/Mips/MipsInstrInfo.cpp
index bb8a5c697cf..1afa216198f 100644
--- a/llvm/lib/Target/Mips/MipsInstrInfo.cpp
+++ b/llvm/lib/Target/Mips/MipsInstrInfo.cpp
@@ -74,7 +74,7 @@ isLoadFromStackSlot(MachineInstr *MI, int &FrameIndex) const
(MI->getOperand(1).isImmediate()) && // the imm is zero
(isZeroImm(MI->getOperand(1))))
{
- FrameIndex = MI->getOperand(2).getFrameIndex();
+ FrameIndex = MI->getOperand(2).getIndex();
return MI->getOperand(0).getReg();
}
}
@@ -95,7 +95,7 @@ isStoreToStackSlot(MachineInstr *MI, int &FrameIndex) const
(MI->getOperand(1).isImmediate()) && // the imm is zero
(isZeroImm(MI->getOperand(1))))
{
- FrameIndex = MI->getOperand(0).getFrameIndex();
+ FrameIndex = MI->getOperand(0).getIndex();
return MI->getOperand(2).getReg();
}
}
@@ -180,7 +180,7 @@ bool MipsInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,
// Unconditional branch
if (LastOpc == Mips::J) {
- TBB = LastInst->getOperand(0).getMachineBasicBlock();
+ TBB = LastInst->getOperand(0).getMBB();
return false;
}
@@ -193,7 +193,7 @@ bool MipsInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,
if (LastOpc != Mips::COND_INVALID) {
int LastNumOp = LastInst->getNumOperands();
- TBB = LastInst->getOperand(LastNumOp-1).getMachineBasicBlock();
+ TBB = LastInst->getOperand(LastNumOp-1).getMBB();
Cond.push_back(MachineOperand::CreateImm(BranchCode));
for (int i=0; i<LastNumOp-1; i++) {
@@ -218,21 +218,21 @@ bool MipsInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,
if (SecondLastOpc != Mips::COND_INVALID && LastOpc == Mips::J) {
int SecondNumOp = SecondLastInst->getNumOperands();
- TBB = SecondLastInst->getOperand(SecondNumOp-1).getMachineBasicBlock();
+ TBB = SecondLastInst->getOperand(SecondNumOp-1).getMBB();
Cond.push_back(MachineOperand::CreateImm(BranchCode));
for (int i=0; i<SecondNumOp-1; i++) {
Cond.push_back(SecondLastInst->getOperand(i));
}
- FBB = LastInst->getOperand(0).getMachineBasicBlock();
+ FBB = LastInst->getOperand(0).getMBB();
return false;
}
// If the block ends with two unconditional branches, handle it. The last
// one is not executed, so remove it.
if ((SecondLastOpc == Mips::J) && (LastOpc == Mips::J)) {
- TBB = SecondLastInst->getOperand(0).getMachineBasicBlock();
+ TBB = SecondLastInst->getOperand(0).getMBB();
I = LastInst;
I->eraseFromParent();
return false;
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