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authorFrancis Visoiu Mistrih <francisvm@yahoo.com>2017-11-28 17:15:09 +0000
committerFrancis Visoiu Mistrih <francisvm@yahoo.com>2017-11-28 17:15:09 +0000
commit9d7bb0cb408e993181fc1b28986c7eb3495f28b9 (patch)
tree117b65c086189d16940bde7b400f0fd4312d98de /llvm/lib/Target/Mips/MipsInstrInfo.cpp
parent2803bfaf001241a98608c263a824a5f5ec542511 (diff)
downloadbcm5719-llvm-9d7bb0cb408e993181fc1b28986c7eb3495f28b9.tar.gz
bcm5719-llvm-9d7bb0cb408e993181fc1b28986c7eb3495f28b9.zip
[CodeGen] Print register names in lowercase in both MIR and debug output
As part of the unification of the debug format and the MIR format, always print registers as lowercase. * Only debug printing is affected. It now follows MIR. Differential Revision: https://reviews.llvm.org/D40417 llvm-svn: 319187
Diffstat (limited to 'llvm/lib/Target/Mips/MipsInstrInfo.cpp')
-rw-r--r--llvm/lib/Target/Mips/MipsInstrInfo.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/Mips/MipsInstrInfo.cpp b/llvm/lib/Target/Mips/MipsInstrInfo.cpp
index 878497ca76f..74394d0e84c 100644
--- a/llvm/lib/Target/Mips/MipsInstrInfo.cpp
+++ b/llvm/lib/Target/Mips/MipsInstrInfo.cpp
@@ -480,7 +480,7 @@ MipsInstrInfo::genInstrWithNewOpc(unsigned NewOpc,
MIB = BuildMI(*I->getParent(), I, I->getDebugLoc(), get(NewOpc));
// For MIPSR6 JI*C requires an immediate 0 as an operand, JIALC(64) an
- // immediate 0 as an operand and requires the removal of it's %RA<imp-def>
+ // immediate 0 as an operand and requires the removal of it's %ra<imp-def>
// implicit operand as copying the implicit operations of the instructio we're
// looking at will give us the correct flags.
if (NewOpc == Mips::JIC || NewOpc == Mips::JIALC || NewOpc == Mips::JIC64 ||
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