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| author | Bruno Cardoso Lopes <bruno.cardoso@gmail.com> | 2008-07-09 04:45:36 +0000 |
|---|---|---|
| committer | Bruno Cardoso Lopes <bruno.cardoso@gmail.com> | 2008-07-09 04:45:36 +0000 |
| commit | 7ceec577030ea342e1b5c556ee18fc453520a1f8 (patch) | |
| tree | 1c2d77b212e5a6f87480f4bf7ed277baf0124bad /llvm/lib/Target/Mips/MipsInstrInfo.cpp | |
| parent | 0d3645e67357a72c93d9f6c3f93d58e4cdde15ca (diff) | |
| download | bcm5719-llvm-7ceec577030ea342e1b5c556ee18fc453520a1f8.tar.gz bcm5719-llvm-7ceec577030ea342e1b5c556ee18fc453520a1f8.zip | |
Fixe typos and 80 column size problems
llvm-svn: 53272
Diffstat (limited to 'llvm/lib/Target/Mips/MipsInstrInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/Mips/MipsInstrInfo.cpp | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/lib/Target/Mips/MipsInstrInfo.cpp b/llvm/lib/Target/Mips/MipsInstrInfo.cpp index 403adece964..687237f9724 100644 --- a/llvm/lib/Target/Mips/MipsInstrInfo.cpp +++ b/llvm/lib/Target/Mips/MipsInstrInfo.cpp @@ -289,7 +289,8 @@ foldMemoryOperand(MachineFunction &MF, case Mips::FMOV_D32: if ((MI->getOperand(0).isRegister()) && (MI->getOperand(1).isRegister())) { - const TargetRegisterClass *RC = RI.getRegClass(MI->getOperand(0).getReg()); + const TargetRegisterClass + *RC = RI.getRegClass(MI->getOperand(0).getReg()); unsigned StoreOpc, LoadOpc; if (RC == Mips::FGR32RegisterClass) { |
