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authorEugene Zelenko <eugene.zelenko@gmail.com>2017-08-03 22:12:30 +0000
committerEugene Zelenko <eugene.zelenko@gmail.com>2017-08-03 22:12:30 +0000
commit79220eaeecccf77591c0a1bdfbd2ecd3ec015e21 (patch)
treee3dd13872a6da5e46bde3a5aa89baa5fde9a99d4 /llvm/lib/Target/Mips/MipsInstrInfo.cpp
parent1046aa31488b9c7cc6cfbe8847af699c7afb6887 (diff)
downloadbcm5719-llvm-79220eaeecccf77591c0a1bdfbd2ecd3ec015e21.tar.gz
bcm5719-llvm-79220eaeecccf77591c0a1bdfbd2ecd3ec015e21.zip
[Mips] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC).
llvm-svn: 309993
Diffstat (limited to 'llvm/lib/Target/Mips/MipsInstrInfo.cpp')
-rw-r--r--llvm/lib/Target/Mips/MipsInstrInfo.cpp33
1 files changed, 19 insertions, 14 deletions
diff --git a/llvm/lib/Target/Mips/MipsInstrInfo.cpp b/llvm/lib/Target/Mips/MipsInstrInfo.cpp
index 4adf77f8d9a..92b1e3440f8 100644
--- a/llvm/lib/Target/Mips/MipsInstrInfo.cpp
+++ b/llvm/lib/Target/Mips/MipsInstrInfo.cpp
@@ -1,4 +1,4 @@
-//===-- MipsInstrInfo.cpp - Mips Instruction Information ------------------===//
+//===- MipsInstrInfo.cpp - Mips Instruction Information -------------------===//
//
// The LLVM Compiler Infrastructure
//
@@ -12,14 +12,22 @@
//===----------------------------------------------------------------------===//
#include "MipsInstrInfo.h"
-#include "InstPrinter/MipsInstPrinter.h"
-#include "MipsMachineFunction.h"
+#include "MCTargetDesc/MipsBaseInfo.h"
+#include "MCTargetDesc/MipsMCTargetDesc.h"
#include "MipsSubtarget.h"
-#include "llvm/ADT/STLExtras.h"
+#include "llvm/ADT/SmallVector.h"
+#include "llvm/CodeGen/MachineBasicBlock.h"
+#include "llvm/CodeGen/MachineFrameInfo.h"
+#include "llvm/CodeGen/MachineFunction.h"
+#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
-#include "llvm/CodeGen/MachineRegisterInfo.h"
-#include "llvm/Support/ErrorHandling.h"
-#include "llvm/Support/TargetRegistry.h"
+#include "llvm/CodeGen/MachineOperand.h"
+#include "llvm/IR/DebugLoc.h"
+#include "llvm/MC/MCInstrDesc.h"
+#include "llvm/Target/TargetMachine.h"
+#include "llvm/Target/TargetOpcodes.h"
+#include "llvm/Target/TargetSubtargetInfo.h"
+#include <cassert>
using namespace llvm;
@@ -35,9 +43,9 @@ MipsInstrInfo::MipsInstrInfo(const MipsSubtarget &STI, unsigned UncondBr)
const MipsInstrInfo *MipsInstrInfo::create(MipsSubtarget &STI) {
if (STI.inMips16Mode())
- return llvm::createMips16InstrInfo(STI);
+ return createMips16InstrInfo(STI);
- return llvm::createMipsSEInstrInfo(STI);
+ return createMipsSEInstrInfo(STI);
}
bool MipsInstrInfo::isZeroImm(const MachineOperand &op) const {
@@ -80,7 +88,7 @@ void MipsInstrInfo::AnalyzeCondBr(const MachineInstr *Inst, unsigned Opc,
BB = Inst->getOperand(NumOp-1).getMBB();
Cond.push_back(MachineOperand::CreateImm(Opc));
- for (int i=0; i<NumOp-1; i++)
+ for (int i = 0; i < NumOp-1; i++)
Cond.push_back(Inst->getOperand(i));
}
@@ -185,7 +193,6 @@ MipsInstrInfo::BranchType MipsInstrInfo::analyzeBranch(
MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB,
SmallVectorImpl<MachineOperand> &Cond, bool AllowModify,
SmallVectorImpl<MachineInstr *> &BranchInstrs) const {
-
MachineBasicBlock::reverse_iterator I = MBB.rbegin(), REnd = MBB.rend();
// Skip all the debug instructions.
@@ -396,7 +403,6 @@ bool MipsInstrInfo::SafeInForbiddenSlot(const MachineInstr &MI) const {
return false;
return (MI.getDesc().TSFlags & MipsII::IsCTI) == 0;
-
}
/// Predicate for distingushing instructions that have forbidden slots.
@@ -514,7 +520,7 @@ bool MipsInstrInfo::findCommutedOpIndices(MachineInstr &MI, unsigned &SrcOpIdx1,
case Mips::DPADD_U_D:
case Mips::DPADD_S_H:
case Mips::DPADD_S_W:
- case Mips::DPADD_S_D: {
+ case Mips::DPADD_S_D:
// The first operand is both input and output, so it should not commute
if (!fixCommutedOpIndices(SrcOpIdx1, SrcOpIdx2, 2, 3))
return false;
@@ -523,6 +529,5 @@ bool MipsInstrInfo::findCommutedOpIndices(MachineInstr &MI, unsigned &SrcOpIdx1,
return false;
return true;
}
- }
return TargetInstrInfo::findCommutedOpIndices(MI, SrcOpIdx1, SrcOpIdx2);
}
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