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author | Simon Dardis <simon.dardis@imgtec.com> | 2016-08-04 09:17:07 +0000 |
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committer | Simon Dardis <simon.dardis@imgtec.com> | 2016-08-04 09:17:07 +0000 |
commit | 57f4ae4625fba08eef7451b14a01ae07d9b632af (patch) | |
tree | 4c52e0b556de23fd9b205721eb820b04fb553e92 /llvm/lib/Target/Mips/MipsInstrInfo.cpp | |
parent | b18751578421b6cc93f70a690d4902d28e18a1a4 (diff) | |
download | bcm5719-llvm-57f4ae4625fba08eef7451b14a01ae07d9b632af.tar.gz bcm5719-llvm-57f4ae4625fba08eef7451b14a01ae07d9b632af.zip |
[mips] Enable tail calls by default
Enable tail calls by default for (micro)MIPS(64).
microMIPS is slightly more tricky than doing it for MIPS(R6) or microMIPSR6.
microMIPS has two instruction encodings: 16bit and 32bit along with some
restrictions on the size of the instruction that can fill the delay slot.
For safe tail calls for microMIPS, the delay slot filler attempts to find
a correct size instruction for the delay slot of TAILCALL pseudos.
Reviewers: dsanders, vkalintris
Subscribers: jfb, dsanders, sdardis, llvm-commits
Differential Revision: https://reviews.llvm.org/D21138
llvm-svn: 277708
Diffstat (limited to 'llvm/lib/Target/Mips/MipsInstrInfo.cpp')
-rw-r--r-- | llvm/lib/Target/Mips/MipsInstrInfo.cpp | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/llvm/lib/Target/Mips/MipsInstrInfo.cpp b/llvm/lib/Target/Mips/MipsInstrInfo.cpp index 1f38ca6447b..c317ecb91b2 100644 --- a/llvm/lib/Target/Mips/MipsInstrInfo.cpp +++ b/llvm/lib/Target/Mips/MipsInstrInfo.cpp @@ -282,6 +282,7 @@ unsigned MipsInstrInfo::getEquivalentCompactForm( case Mips::JR: case Mips::PseudoReturn: case Mips::PseudoIndirectBranch: + case Mips::TAILCALLREG_MM: canUseShortMicroMipsCTI = true; break; } @@ -362,6 +363,8 @@ unsigned MipsInstrInfo::getEquivalentCompactForm( case Mips::JR: case Mips::PseudoReturn: case Mips::PseudoIndirectBranch: + case Mips::TAILCALLREG_MM: + case Mips::TAILCALLREG_R6: if (canUseShortMicroMipsCTI) return Mips::JRC16_MM; return Mips::JIC; @@ -370,6 +373,7 @@ unsigned MipsInstrInfo::getEquivalentCompactForm( case Mips::JR64: case Mips::PseudoReturn64: case Mips::PseudoIndirectBranch64: + case Mips::TAILCALLREG64_R6: return Mips::JIC64; case Mips::JALR64Pseudo: return Mips::JIALC64; |