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| author | Hrvoje Varga <Hrvoje.Varga@imgtec.com> | 2016-07-22 07:18:33 +0000 |
|---|---|---|
| committer | Hrvoje Varga <Hrvoje.Varga@imgtec.com> | 2016-07-22 07:18:33 +0000 |
| commit | 2db00ce4b6893fc58a31e33aa9e771c3e206b2fc (patch) | |
| tree | 4994401651a50fea4a9b4bf314a16d96813d0800 /llvm/lib/Target/Mips/MipsInstrInfo.cpp | |
| parent | 74dc3cb431b438348c0c77b2c70029fc966f60b9 (diff) | |
| download | bcm5719-llvm-2db00ce4b6893fc58a31e33aa9e771c3e206b2fc.tar.gz bcm5719-llvm-2db00ce4b6893fc58a31e33aa9e771c3e206b2fc.zip | |
[mips][microMIPS] Implement SLT, SLTI, SLTIU, SLTU microMIPS32r6 instructions
Differential Revision: https://reviews.llvm.org/D19906
llvm-svn: 276397
Diffstat (limited to 'llvm/lib/Target/Mips/MipsInstrInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/Mips/MipsInstrInfo.cpp | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/llvm/lib/Target/Mips/MipsInstrInfo.cpp b/llvm/lib/Target/Mips/MipsInstrInfo.cpp index 800d834e0ab..9bbdd7db8b8 100644 --- a/llvm/lib/Target/Mips/MipsInstrInfo.cpp +++ b/llvm/lib/Target/Mips/MipsInstrInfo.cpp @@ -269,7 +269,9 @@ unsigned MipsInstrInfo::getEquivalentCompactForm( if (Subtarget.inMicroMipsMode()) { switch (Opcode) { case Mips::BNE: + case Mips::BNE_MM: case Mips::BEQ: + case Mips::BEQ_MM: // microMIPS has NE,EQ branches that do not have delay slots provided one // of the operands is zero. if (I->getOperand(1).getReg() == Subtarget.getABI().GetZeroReg()) @@ -302,12 +304,14 @@ unsigned MipsInstrInfo::getEquivalentCompactForm( case Mips::BAL: return Mips::BALC; case Mips::BEQ: + case Mips::BEQ_MM: if (canUseShortMicroMipsCTI) return Mips::BEQZC_MM; else if (I->getOperand(0).getReg() == I->getOperand(1).getReg()) return 0; return Mips::BEQC; case Mips::BNE: + case Mips::BNE_MM: if (canUseShortMicroMipsCTI) return Mips::BNEZC_MM; else if (I->getOperand(0).getReg() == I->getOperand(1).getReg()) |
