summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/Mips/MipsInstrInfo.cpp
diff options
context:
space:
mode:
authorOwen Anderson <resistor@mac.com>2008-08-26 18:03:31 +0000
committerOwen Anderson <resistor@mac.com>2008-08-26 18:03:31 +0000
commit27fb3dcbc738451856f641c70c94ed44a6b44ffd (patch)
tree75b9eeb837647d4fec784eca9e3115ce7ee56f36 /llvm/lib/Target/Mips/MipsInstrInfo.cpp
parent4310d3984446bfea6401bc1d2eb0ea6e45b73c36 (diff)
downloadbcm5719-llvm-27fb3dcbc738451856f641c70c94ed44a6b44ffd.tar.gz
bcm5719-llvm-27fb3dcbc738451856f641c70c94ed44a6b44ffd.zip
Make TargetInstrInfo::copyRegToReg return a bool indicating whether the copy requested
was inserted or not. This allows bitcast in fast isel to properly handle the case where an appropriate reg-to-reg copy is not available. llvm-svn: 55375
Diffstat (limited to 'llvm/lib/Target/Mips/MipsInstrInfo.cpp')
-rw-r--r--llvm/lib/Target/Mips/MipsInstrInfo.cpp16
1 files changed, 10 insertions, 6 deletions
diff --git a/llvm/lib/Target/Mips/MipsInstrInfo.cpp b/llvm/lib/Target/Mips/MipsInstrInfo.cpp
index 2d016c67d46..4a919a0a28e 100644
--- a/llvm/lib/Target/Mips/MipsInstrInfo.cpp
+++ b/llvm/lib/Target/Mips/MipsInstrInfo.cpp
@@ -118,7 +118,7 @@ insertNoop(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI) const
BuildMI(MBB, MI, get(Mips::NOP));
}
-void MipsInstrInfo::
+bool MipsInstrInfo::
copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
unsigned DestReg, unsigned SrcReg,
const TargetRegisterClass *DestRC,
@@ -141,10 +141,10 @@ copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
BuildMI(MBB, I, get(Mips::MTC1A), DestReg).addReg(SrcReg);
else if ((SrcRC == Mips::CCRRegisterClass) &&
(SrcReg == Mips::FCR31))
- return; // This register is used implicitly, no copy needed.
+ return true; // This register is used implicitly, no copy needed.
else if ((DestRC == Mips::CCRRegisterClass) &&
(DestReg == Mips::FCR31))
- return; // This register is used implicitly, no copy needed.
+ return true; // This register is used implicitly, no copy needed.
else if ((DestRC == Mips::HILORegisterClass) &&
(SrcRC == Mips::CPURegsRegisterClass)) {
unsigned Opc = (DestReg == Mips::HI) ? Mips::MTHI : Mips::MTLO;
@@ -154,9 +154,10 @@ copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
unsigned Opc = (SrcReg == Mips::HI) ? Mips::MFHI : Mips::MFLO;
BuildMI(MBB, I, get(Opc), DestReg);
} else
- assert (0 && "DestRC != SrcRC, Can't copy this register");
+ // DestRC != SrcRC, Can't copy this register
+ return false;
- return;
+ return true;
}
if (DestRC == Mips::CPURegsRegisterClass)
@@ -169,7 +170,10 @@ copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
else if (DestRC == Mips::AFGR64RegisterClass)
BuildMI(MBB, I, get(Mips::FMOV_D32), DestReg).addReg(SrcReg);
else
- assert (0 && "Can't copy this register");
+ // Can't copy this register
+ return false;
+
+ return true;
}
void MipsInstrInfo::
OpenPOWER on IntegriCloud