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| author | Akira Hatanaka <ahatanaka@mips.com> | 2013-07-26 20:51:20 +0000 |
|---|---|---|
| committer | Akira Hatanaka <ahatanaka@mips.com> | 2013-07-26 20:51:20 +0000 |
| commit | 8bce21c154fa363b3d8ae0d8fdba4ffec6931df4 (patch) | |
| tree | 7fab74a80670b2ffc69d1f8e791e6c7904904040 /llvm/lib/Target/Mips/MipsInstrFormats.td | |
| parent | 1cfc5dd4bddd1ebf27efabc59b2853b79665d61c (diff) | |
| download | bcm5719-llvm-8bce21c154fa363b3d8ae0d8fdba4ffec6931df4.tar.gz bcm5719-llvm-8bce21c154fa363b3d8ae0d8fdba4ffec6931df4.zip | |
[mips] Fix FP conditional move instructions to have explicit FP condition code
register operands.
llvm-svn: 187242
Diffstat (limited to 'llvm/lib/Target/Mips/MipsInstrFormats.td')
| -rw-r--r-- | llvm/lib/Target/Mips/MipsInstrFormats.td | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/llvm/lib/Target/Mips/MipsInstrFormats.td b/llvm/lib/Target/Mips/MipsInstrFormats.td index 61b01c0874c..fb55cd29025 100644 --- a/llvm/lib/Target/Mips/MipsInstrFormats.td +++ b/llvm/lib/Target/Mips/MipsInstrFormats.td @@ -716,12 +716,13 @@ class CMov_I_F_FM<bits<6> funct, bits<5> fmt> { class CMov_F_I_FM<bit tf> { bits<5> rd; bits<5> rs; + bits<3> fcc; bits<32> Inst; let Inst{31-26} = 0; let Inst{25-21} = rs; - let Inst{20-18} = 0; // cc + let Inst{20-18} = fcc; let Inst{17} = 0; let Inst{16} = tf; let Inst{15-11} = rd; @@ -732,12 +733,13 @@ class CMov_F_I_FM<bit tf> { class CMov_F_F_FM<bits<5> fmt, bit tf> { bits<5> fd; bits<5> fs; + bits<3> fcc; bits<32> Inst; let Inst{31-26} = 0x11; let Inst{25-21} = fmt; - let Inst{20-18} = 0; // cc + let Inst{20-18} = fcc; let Inst{17} = 0; let Inst{16} = tf; let Inst{15-11} = fs; |
