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author | Akira Hatanaka <ahatanak@gmail.com> | 2011-09-26 21:37:50 +0000 |
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committer | Akira Hatanaka <ahatanak@gmail.com> | 2011-09-26 21:37:50 +0000 |
commit | e5ce7090228aa49732d17c827d76ec9f4e6b9778 (patch) | |
tree | 248c6e38f46e58a801555e76d8d94b7ea145dd4c /llvm/lib/Target/Mips/MipsISelLowering.cpp | |
parent | ab7b99ab9cdd337ce44859ceaf77efa440704350 (diff) | |
download | bcm5719-llvm-e5ce7090228aa49732d17c827d76ec9f4e6b9778.tar.gz bcm5719-llvm-e5ce7090228aa49732d17c827d76ec9f4e6b9778.zip |
In single float mode, double precision FP arguments are passed in integer
registers, so there is no need to check here.
llvm-svn: 140568
Diffstat (limited to 'llvm/lib/Target/Mips/MipsISelLowering.cpp')
-rw-r--r-- | llvm/lib/Target/Mips/MipsISelLowering.cpp | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/llvm/lib/Target/Mips/MipsISelLowering.cpp b/llvm/lib/Target/Mips/MipsISelLowering.cpp index 77650c7ef07..130e359c632 100644 --- a/llvm/lib/Target/Mips/MipsISelLowering.cpp +++ b/llvm/lib/Target/Mips/MipsISelLowering.cpp @@ -2267,10 +2267,9 @@ MipsTargetLowering::LowerFormalArguments(SDValue Chain, RC = Mips::CPU64RegsRegisterClass; else if (RegVT == MVT::f32) RC = Mips::FGR32RegisterClass; - else if (RegVT == MVT::f64) { - if (!Subtarget->isSingleFloat()) - RC = Mips::AFGR64RegisterClass; - } else + else if (RegVT == MVT::f64) + RC = Mips::AFGR64RegisterClass; + else llvm_unreachable("RegVT not supported by FormalArguments Lowering"); // Transform the arguments stored on |