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author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2015-06-01 05:31:59 +0000 |
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committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2015-06-01 05:31:59 +0000 |
commit | bd7d80a4a6b70bf303fd9344d3e70bbe1420062a (patch) | |
tree | 1aa6a8e53ce6145eb05260d2c74335ac3c244dd2 /llvm/lib/Target/Mips/MipsISelLowering.cpp | |
parent | 0dba2b399e1cd331f70002f6b922e45bda2b5c2c (diff) | |
download | bcm5719-llvm-bd7d80a4a6b70bf303fd9344d3e70bbe1420062a.tar.gz bcm5719-llvm-bd7d80a4a6b70bf303fd9344d3e70bbe1420062a.zip |
Add address space argument to isLegalAddressingMode
This is important because of different addressing modes
depending on the address space for GPU targets.
This only adds the argument, and does not update
any of the uses to provide the correct address space.
llvm-svn: 238723
Diffstat (limited to 'llvm/lib/Target/Mips/MipsISelLowering.cpp')
-rw-r--r-- | llvm/lib/Target/Mips/MipsISelLowering.cpp | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/lib/Target/Mips/MipsISelLowering.cpp b/llvm/lib/Target/Mips/MipsISelLowering.cpp index 6c7f0895b42..67ddcc4dacb 100644 --- a/llvm/lib/Target/Mips/MipsISelLowering.cpp +++ b/llvm/lib/Target/Mips/MipsISelLowering.cpp @@ -3547,7 +3547,8 @@ void MipsTargetLowering::LowerAsmOperandForConstraint(SDValue Op, } bool MipsTargetLowering::isLegalAddressingMode(const AddrMode &AM, - Type *Ty) const { + Type *Ty, + unsigned AS) const { // No global is ever allowed as a base. if (AM.BaseGV) return false; |