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| author | Craig Topper <craig.topper@gmail.com> | 2012-02-22 05:59:10 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@gmail.com> | 2012-02-22 05:59:10 +0000 |
| commit | 760b134ffa8bb88ccc96fc2230ab7e5fa501e921 (patch) | |
| tree | ca022afc03390f4d96618946d26a8c5e347590e6 /llvm/lib/Target/Mips/MipsISelLowering.cpp | |
| parent | 91d5bb1ee5e795dbad776856188f60a195d05d5a (diff) | |
| download | bcm5719-llvm-760b134ffa8bb88ccc96fc2230ab7e5fa501e921.tar.gz bcm5719-llvm-760b134ffa8bb88ccc96fc2230ab7e5fa501e921.zip | |
Make all pointers to TargetRegisterClass const since they are all pointers to static data that should not be modified.
llvm-svn: 151134
Diffstat (limited to 'llvm/lib/Target/Mips/MipsISelLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/Mips/MipsISelLowering.cpp | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/llvm/lib/Target/Mips/MipsISelLowering.cpp b/llvm/lib/Target/Mips/MipsISelLowering.cpp index 240b6c9c045..a93e0ac5a68 100644 --- a/llvm/lib/Target/Mips/MipsISelLowering.cpp +++ b/llvm/lib/Target/Mips/MipsISelLowering.cpp @@ -710,7 +710,7 @@ LowerOperation(SDValue Op, SelectionDAG &DAG) const // MachineFunction as a live in value. It also creates a corresponding // virtual register for it. static unsigned -AddLiveIn(MachineFunction &MF, unsigned PReg, TargetRegisterClass *RC) +AddLiveIn(MachineFunction &MF, unsigned PReg, const TargetRegisterClass *RC) { assert(RC->contains(PReg) && "Not the correct regclass!"); unsigned VReg = MF.getRegInfo().createVirtualRegister(RC); @@ -2601,7 +2601,7 @@ MipsTargetLowering::LowerFormalArguments(SDValue Chain, if (IsRegLoc) { EVT RegVT = VA.getLocVT(); unsigned ArgReg = VA.getLocReg(); - TargetRegisterClass *RC = 0; + const TargetRegisterClass *RC; if (RegVT == MVT::i32) RC = Mips::CPURegsRegisterClass; @@ -2684,7 +2684,7 @@ MipsTargetLowering::LowerFormalArguments(SDValue Chain, const unsigned *ArgRegs = IsO32 ? O32IntRegs : Mips64IntRegs; unsigned Idx = CCInfo.getFirstUnallocated(ArgRegs, NumOfRegs); int FirstRegSlotOffset = IsO32 ? 0 : -64 ; // offset of $a0's slot. - TargetRegisterClass *RC + const TargetRegisterClass *RC = IsO32 ? Mips::CPURegsRegisterClass : Mips::CPU64RegsRegisterClass; unsigned RegSize = RC->getSize(); int RegSlotOffset = FirstRegSlotOffset + Idx * RegSize; |
