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authorKevin Qin <Kevin.Qin@arm.com>2014-07-24 02:05:42 +0000
committerKevin Qin <Kevin.Qin@arm.com>2014-07-24 02:05:42 +0000
commit9a2a2c502b34a4697930c2c6bfbbf460c27b08c8 (patch)
tree6aca220c0ac5103ba4e833e38606a300c2936f2c /llvm/lib/Target/Mips/MipsISelDAGToDAG.h
parent9e7da0fb44b6d999700ba96743b16c1c112c2baa (diff)
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bcm5719-llvm-9a2a2c502b34a4697930c2c6bfbbf460c27b08c8.zip
[AArch64] Fix a bug generating incorrect instruction when building small vector.
This bug is introduced by r211144. The element of operand may be smaller than the element of result, but previous commit can only handle the contrary condition. This commit is to handle this scenario and generate optimized codes like ZIP1. llvm-svn: 213830
Diffstat (limited to 'llvm/lib/Target/Mips/MipsISelDAGToDAG.h')
0 files changed, 0 insertions, 0 deletions
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