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| author | Krzysztof Parzyszek <kparzysz@codeaurora.org> | 2017-04-24 18:55:33 +0000 |
|---|---|---|
| committer | Krzysztof Parzyszek <kparzysz@codeaurora.org> | 2017-04-24 18:55:33 +0000 |
| commit | 44e25f37ae2422bbfb0466d7b6d2836034817d32 (patch) | |
| tree | d0e1d292f74866cb29b10df73d8d6ba11d721228 /llvm/lib/Target/Mips/MipsFrameLowering.cpp | |
| parent | 49e033f41d45b8fdb09bfc2b195986704039a765 (diff) | |
| download | bcm5719-llvm-44e25f37ae2422bbfb0466d7b6d2836034817d32.tar.gz bcm5719-llvm-44e25f37ae2422bbfb0466d7b6d2836034817d32.zip | |
Move size and alignment information of regclass to TargetRegisterInfo
1. RegisterClass::getSize() is split into two functions:
- TargetRegisterInfo::getRegSizeInBits(const TargetRegisterClass &RC) const;
- TargetRegisterInfo::getSpillSize(const TargetRegisterClass &RC) const;
2. RegisterClass::getAlignment() is replaced by:
- TargetRegisterInfo::getSpillAlignment(const TargetRegisterClass &RC) const;
This will allow making those values depend on subtarget features in the
future.
Differential Revision: https://reviews.llvm.org/D31783
llvm-svn: 301221
Diffstat (limited to 'llvm/lib/Target/Mips/MipsFrameLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/Mips/MipsFrameLowering.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/Mips/MipsFrameLowering.cpp b/llvm/lib/Target/Mips/MipsFrameLowering.cpp index b2cf03976f8..ef05166503b 100644 --- a/llvm/lib/Target/Mips/MipsFrameLowering.cpp +++ b/llvm/lib/Target/Mips/MipsFrameLowering.cpp @@ -119,7 +119,7 @@ uint64_t MipsFrameLowering::estimateStackSize(const MachineFunction &MF) const { // Conservatively assume all callee-saved registers will be saved. for (const MCPhysReg *R = TRI.getCalleeSavedRegs(&MF); *R; ++R) { - unsigned Size = TRI.getMinimalPhysRegClass(*R)->getSize(); + unsigned Size = TRI.getSpillSize(*TRI.getMinimalPhysRegClass(*R)); Offset = alignTo(Offset + Size, Size); } |
