summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/Mips/MipsCodeEmitter.cpp
diff options
context:
space:
mode:
authorZoran Jovanovic <zoran.jovanovic@imgtec.com>2014-06-09 09:49:51 +0000
committerZoran Jovanovic <zoran.jovanovic@imgtec.com>2014-06-09 09:49:51 +0000
commit2855142ac561a8dbc9854ff7972653c5831b4c82 (patch)
treed22b3e788d576819bbaf19493f03ecfec7e4553f /llvm/lib/Target/Mips/MipsCodeEmitter.cpp
parent2be29929beb4541f202c6a2301920a61fd3a75f5 (diff)
downloadbcm5719-llvm-2855142ac561a8dbc9854ff7972653c5831b4c82.tar.gz
bcm5719-llvm-2855142ac561a8dbc9854ff7972653c5831b4c82.zip
[mips][mips64r6] Add LDPC instruction
Differential Revision: http://reviews.llvm.org/D3822 llvm-svn: 210460
Diffstat (limited to 'llvm/lib/Target/Mips/MipsCodeEmitter.cpp')
-rw-r--r--llvm/lib/Target/Mips/MipsCodeEmitter.cpp7
1 files changed, 7 insertions, 0 deletions
diff --git a/llvm/lib/Target/Mips/MipsCodeEmitter.cpp b/llvm/lib/Target/Mips/MipsCodeEmitter.cpp
index 13fa546b9eb..151ef134e1d 100644
--- a/llvm/lib/Target/Mips/MipsCodeEmitter.cpp
+++ b/llvm/lib/Target/Mips/MipsCodeEmitter.cpp
@@ -124,6 +124,7 @@ private:
unsigned getSizeInsEncoding(const MachineInstr &MI, unsigned OpNo) const;
unsigned getLSAImmEncoding(const MachineInstr &MI, unsigned OpNo) const;
unsigned getSimm19Lsl2Encoding(const MachineInstr &MI, unsigned OpNo) const;
+ unsigned getSimm18Lsl3Encoding(const MachineInstr &MI, unsigned OpNo) const;
/// Expand pseudo instructions with accumulator register operands.
void expandACCInstr(MachineBasicBlock::instr_iterator MI,
@@ -273,6 +274,12 @@ unsigned MipsCodeEmitter::getLSAImmEncoding(const MachineInstr &MI,
return 0;
}
+unsigned MipsCodeEmitter::getSimm18Lsl3Encoding(const MachineInstr &MI,
+ unsigned OpNo) const {
+ llvm_unreachable("Unimplemented function.");
+ return 0;
+}
+
unsigned MipsCodeEmitter::getSimm19Lsl2Encoding(const MachineInstr &MI,
unsigned OpNo) const {
llvm_unreachable("Unimplemented function.");
OpenPOWER on IntegriCloud